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Description: 心电采集中A/D的代码,需要的可以参考一下-ECG acquisition A/D code, needed for reference
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Size: 4096 |
Author: 黄建 |
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Description: 心电图机中1MV定标电路的VHDL代码,可以实现-ECG 1mV calibration circuit VHDL code can be achieved
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Size: 2048 |
Author: 黄建 |
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Description: 心电图机中灵敏度控制的VHDL代码,想交流的加我QQ147440013-ECG sensitivity control VHDL code, plus I would like to exchange QQ147440013
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Size: 3072 |
Author: 黄建 |
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Description: 在本文中,我们提出了一种新算法,利用重建相图的特征和迟豫坐标去实现QRS波群的实时检测。-In this article, we propose a new algorithm using the characteristics of reconstructed phase portraits by delaycoordinate mapping utilizing lag rotundity for a real-time detection of QRS complexes in ECG signals.
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Size: 605184 |
Author: 牛莉 |
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Description: Low pass fir filter for ecg signal in VHDL
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Size: 1024 |
Author: rohan |
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Description: 一个基于fpga的简单的实时心电检测系统,包括与pc通讯和qrs检测两部分-A simple fpga-based real-time ECG detection system, including communication with the pc and qrs detection of two parts
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Size: 15360 |
Author: DC |
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Description: receipt ECG signal and count pick of signal
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Size: 266240 |
Author: hamed |
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Description: 本设计中应用硬件描述语言Verilog HDL描述相位累加器,相位调制器,正弦波、方波、三角波、心电波形四个独立的波形存储器,并描述频率控制、相位控字、幅度控制单元及波形切换等相关的功能单元。-Application of the design described in Verilog HDL hardware description language phase accumulator, phase modulator, sine, square, triangle wave, the four independent ECG waveform memory, and describe the frequency control, phase control word, control unit and the waveform amplitude switching and other related functional units.
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Size: 4096 |
Author: kelly |
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