Search - vhdl filter

[VHDL-FPGA-Verilog] fir_filter

Description: 常系数的FIR滤波器VHDL设计文件，在MUX+plusII调试通过-regular FIR filter coefficients of VHDL design documents, the debugging through MUX plusII
Platform: | Size: 3072 | Author: li | Hits:

[VHDL-FPGA-Verilog] fir-vhdl

Description: 用Vhdl硬件描述语言编写的FIR数字滤波器-Vhdl using Hardware Description Languages in preparing the FIR digital filter
Platform: | Size: 5120 | Author: MAX | Hits:

[Software Engineering] filter-vhdl-code

Description: filter-vhdl-code.rar为滤波器的完整VHDL程序，可用于IIR与FIR滤波器的仿真与验证实现，包括代码综合。使用版本为ISE6.3.-filter-vhdl-code.rar for the integrity of filter VHDL procedures, can be used for IIR and FIR filters realize simulation and verification, including an integrated code. Use version ISE6.3.
Platform: | Size: 173056 | Author: petri | Hits:

[VHDL-FPGA-Verilog] DIGTAL_FIR

Description: 环路滤波器的设计，基于FPGA的锁相环应用。-Loop filter design, FPGA-based PLL applications.
Platform: | Size: 774144 | Author: 梁大法 | Hits:

[VHDL-FPGA-Verilog] mid-filter

Description: 用vhdl语言实现的中值滤波,硬件需要DE2板-VHDL language used to achieve the median filter, the hardware need to DE2 board
Platform: | Size: 1270784 | Author: 任迎 | Hits:

[VHDL-FPGA-Verilog] Filter

Description: vhdl抗抖动滤波器的设计，包括完整的工程-VHDL anti-jitter filter design, including the complete works
Platform: | Size: 256000 | Author: wanyou2345 | Hits:

[Software Engineering] bandpass-filter

Description: 这是一篇关于带通滤波器的毕业设计论文，涵盖IIR与FIR滤波器的设计！-This is an article on the band-pass filter design graduate thesis, covering IIR and FIR filter design!
Platform: | Size: 1155072 | Author: yuming | Hits:

[Communication-Mobile] filter

Description: 时钟滤波器设计，可进行毛刺去除，有需要可依进行参考设计-Clock filter design can be carried out burr removed, there is a need-based reference design
Platform: | Size: 2048 | Author: lee | Hits:

[VHDL-FPGA-Verilog] filter

Description: 图像处理技术中3*3模板的滤波电路的VHDL实现.-Image processing technology in the 3* 3 template VHDL implementation of the filter circuit.
Platform: | Size: 292864 | Author: 翁文天 | Hits:

[Software Engineering] firfilter

Description: Filter designed in fpga
Platform: | Size: 1091584 | Author: buhuhubau | Hits:

[Other] filter

Description: 滤波器的概念阐述，及一些常用的设计方法，主要用在数字系统中-Explained the concept of filters, and some commonly used design methods, mainly used in digital systems
Platform: | Size: 178176 | Author: li | Hits:

[VHDL-FPGA-Verilog] vhdl

Description: FIR滤波器的性能参数设计一个滤波器最基本的就是性能参数的,决定着滤波器的实际功能.比如阶数,截至频率。本文滤波器设计参数 ①输入,输出数据宽度10位 ②阶数为4阶的线性相位FIR滤波器， ③类型:带通 -FIR filter performance parameters The design of a filter is the most basic performance parameters, determines the actual filter function. For example, the order, as the frequency. In this paper, filter design parameters ① input and output data width of 10 ② order for the 4 order of the linear phase FIR filter, ③ Type: Band Pass
Platform: | Size: 3072 | Author: bobo | Hits:

[VHDL-FPGA-Verilog] fir-vhdl-code

Description: FIR FILTER CODE with VHDL
Platform: | Size: 114688 | Author: mahmoud | Hits:

[VHDL-FPGA-Verilog] MovingAverageFilter

Description: This zip file contains the moving average filter code written in verilog HDL
Platform: | Size: 1147904 | Author: Jagan | Hits:

[Other Embeded program] vhdl

Description: there is Design a butterworth low pass IIR filter. (a) Using butterworth to design an IIR low pass filter with Fs=8192hz and Fpass =1000 and Fstop =1200. You use the minimum order of filter. And match exactly at pass band. and other programs
Platform: | Size: 2048 | Author: fathima | Hits:

[Other] filter

Description: FIR数字滤波器的实现，采用Kaiser窗实现高精度的地痛滤波器。-The realization of FIR digital filter using Kaiser window filter to achieve high accuracy in pain.
Platform: | Size: 4096 | Author: Jin Wei | Hits:

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[VHDL-FPGA-Verilog] fir_filter

[VHDL-FPGA-Verilog] fir-vhdl

[Software Engineering] filter-vhdl-code

[VHDL-FPGA-Verilog] DIGTAL_FIR

[VHDL-FPGA-Verilog] mid-filter

[VHDL-FPGA-Verilog] Filter

[Software Engineering] bandpass-filter

[Communication-Mobile] filter

[VHDL-FPGA-Verilog] filter

[Software Engineering] firfilter

[Other] filter

[VHDL-FPGA-Verilog] vhdl

[VHDL-FPGA-Verilog] fir-vhdl-code

[VHDL-FPGA-Verilog] MovingAverageFilter

[Other Embeded program] vhdl

[Other] filter

[Documents] VHDL-FIRfilter

[VHDL-FPGA-Verilog] IIR(vhdl)

[VHDL-FPGA-Verilog] 32jie-vhdl-fir

[VHDL-FPGA-Verilog] FIR-filter-vhdl

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