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[VHDL-FPGA-Verilog] hdlc

Description: HDLC通信模块发送接收模块VHDL源码-HDLC communication module to send receiver module VHDL source code
Platform: | Size: 3072 | Author: ditto | Hits:

[VHDL-FPGA-Verilog] core

Description: HDLC core, standalone controller with buffers. vhdl source code
Platform: | Size: 17408 | Author: Hellen | Hits:

[VHDL-FPGA-Verilog] hdlc

Description: 这是VHDL语言编写的实现 HDLC通信协议的源代码-This is the HDLC communications protocol source code written in VHDL language
Platform: | Size: 10240 | Author: sean | Hits:

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