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[Other resource] USB 1.1 IP-CORE和设计范例 VHDL源代码

Description: USB 1.1 IP-CORE和设计范例 VHDL源代码-Sample program for USB1.1 IP core design, VHDL source code
Platform: | Size: 426278 | Author: ken | Hits:

[VHDL-FPGA-Verilog] USB 1.1 IP-CORE和设计范例 VHDL源代码

Description: USB 1.1 IP-CORE和设计范例 VHDL源代码-Sample program for USB1.1 IP core design, VHDL source code
Platform: | Size: 425984 | Author: ken | Hits:

[VHDL-FPGA-Verilog] FFT变换的IP核的源代码 VHDL~

Description: FFT变换的IP核的源代码 VHDL~-FFT IP core of the source code for VHDL ~
Platform: | Size: 31744 | Author: 陈旭 | Hits:

[ARM-PowerPC-ColdFire-MIPS] IPCORE

Description: 最简单的八位单片机8051的源代码，支持MCS51的汇编语言，可综合，VHDL语言描述，有测试环境-most simple eight SCM 8051 source code, a compilation support MCS51 language, integrated, VHDL description of a test environment
Platform: | Size: 137216 | Author: 许盛 | Hits:

[Other] 8051_ip_core

Description: 8051微控制器的ip 核的vhdl源代码,其中包含了相应的测试程序.-8051 micro-controller ip nuclear vhdl source code, which contains the corresponding test procedures.
Platform: | Size: 339968 | Author: 大为 | Hits:

[MiddleWare] fftipcore

Description: 该程序是vhdl语言编写的fft变换的ip核代码，程序中共包含了36个.vhd文件-that the procedure was prepared by the vhdl language fft transform ip nuclear code CPC procedures contained 36. vhd documents
Platform: | Size: 29696 | Author: 袁汇 | Hits:

[Compress-Decompress algrithms] fft

Description: VHDL语言编写的fft变换的ip核代码 对算法感兴趣的可以-VHDL language fft transform algorithm ip core code can be interested in
Platform: | Size: 459776 | Author: liujl | Hits:

[VHDL-FPGA-Verilog] ip_fft128

Description: 128点fft的IP核vhdl源代码，另有其控制代码。-128 point fft s IP core VHDL source code, while its control code.
Platform: | Size: 7168 | Author: 戈立军 | Hits:

[VHDL-FPGA-Verilog] core_arm.tar

Description: ARM7系统IP核的VHDL语言源代码，需要的开发环境是QUARTUS II 6.0。-ARM7 System IP Core VHDL language source code, the need for the development environment is QUARTUS II 6.0.
Platform: | Size: 666624 | Author: 周华茂 | Hits:

[VHDL-FPGA-Verilog] keyboardcontroller.tar

Description: 键盘控制电路IP核的VHDL语言源代码，需要的开发环境是QUARTUS II 6.0。-Keyboard control circuit IP core VHDL language source code, the need for the development environment is QUARTUS II 6.0.
Platform: | Size: 5120 | Author: 周华茂 | Hits:

[VHDL-FPGA-Verilog] sdram_ctrl.tar

Description: SDRAM控制IP核的VHDL语言源代码，需要的开发环境是QUARTUS II 6.0。-SDRAM control IP core VHDL language source code, the need for the development environment is QUARTUS II 6.0.
Platform: | Size: 88064 | Author: 周华茂 | Hits:

[VHDL-FPGA-Verilog] 8051Core

Description: 8051IP内核的源码，内有vhdl源代码，希望对大家有帮助-8051IP kernel source code, with VHDL source code, I hope all of you help
Platform: | Size: 1146880 | Author: sylivian | Hits:

[Other] EHERNETIPcore

Description: 该文件包含以太网IP核的相关代码，一共包含24个VERILOG源代码-This document contains the relevant Ethernet IP core code, a total of 24 includes Verilog source code
Platform: | Size: 69632 | Author: season | Hits:

[VHDL-FPGA-Verilog] dds

Description: DDs直接数字频率合成器的源代码，其中包括采用IP核和普通两种方式-DDS Direct Digital Synthesizer source code, including the use of IP core and the general two ways
Platform: | Size: 1378304 | Author: 谭儆轩 | Hits:

[VHDL-FPGA-Verilog] uart16550.tar

Description: uart16550 ip core 通用异步收发器vhdl源代码-uart16550 ip core UART VHDL source code
Platform: | Size: 246784 | Author: 姓名 | Hits:

[VHDL-FPGA-Verilog] freerisc8_11

Description: 一个基于VHDL 的简单8位CPU的IP core核心代码-VHDL based on a simple 8-bit CPU core code of the IP core
Platform: | Size: 275456 | Author: wfs | Hits:

[VHDL-FPGA-Verilog] PCI-IPcoreor1k[1]

Description: PCI的ip core，VHDL代码，希望对大家有帮助-PCI-ip core, VHDL code, we hope to help
Platform: | Size: 1064960 | Author: 李明 | Hits:

[VHDL-FPGA-Verilog] wishbone_VHDL

Description: wishbone总线的VHDL源代码 wishbone适用于与FPGA中IP核的高速通信，其接口简单，速度快 成为ip通信的主流-Wishbone Bus VHDL source code Wishbone applicable to IP core in FPGA high-speed communications, and its easy interface, fast becoming the mainstream of ip communications
Platform: | Size: 464896 | Author: 王鹏 | Hits:

[VHDL-FPGA-Verilog] vhdl-MIPS

Description: Quartus-Altera Nios... VHDl based, complete MIPS implementation, document, flowcharts plus code
Platform: | Size: 4330496 | Author: ak | Hits:

[USB develop] USB-1.1-IP-CORE-VHDL

Description: USB1.1标准接口的IP核的实现和其设计实现的源码范例VHDL-USB1.1 standard interface IP core implementations and examples of their design and implementation of the VHDL source code
Platform: | Size: 425984 | Author: sxhfjgl010 | Hits:
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