Search - vhdl maxplus

[Other resource] 100个vhdl设计例子

Description: 内附多路选择器，74系列芯片VHDL源码，加法器，FIR，比较器等大量例子，对初学VHDL语言很有好处。可用maxplus，quartus，synplicity等综合软件进行调试-contains multiple-choice, 74 chips VHDL source code, the adder, FIR, comparators, etc. are plenty of examples for beginners VHDL very good. Available maxplus, Quartus, synplicity integrated software debugging
Platform: | Size: 233299 | Author: 杰轩 | Hits:

[Other resource] VHDL-Clock

Description: 用VHDL语言写的时钟程序。采用模块化编程。可在EPM7128芯片上下载。编译环境可用Maxplus或Quartus。-write VHDL clock procedures. Modular programming. The EPM7128 chips download. Build environment or Quartus Maxplus available.
Platform: | Size: 4347 | Author: 单单 | Hits:

[Other] vhdl

Description: 基于MAXPLUS II 的软件设计，这里面有几个小程序，用于VHDL的GDF设计，含有LED数码管的显示驱动程序，还有3选一，十选一程序。-II FPGA-based design software, there are several small procedures, GDF for VHDL design with a digital LED display driver of the procedures, there is a three elections. 10 election procedure.
Platform: | Size: 2442 | Author: 梁兵 | Hits:

[Software Engineering] maxplus

Description: maxplus教程 VHDL FPGA PLCD
Platform: | Size: 235576 | Author: 陈X | Hits:

[VHDL-FPGA-Verilog] 用VHDL编写的带报错和暂停控制功能的交通灯

Description: 现代数字系统作业在maxplus 10.0中调试通过
Platform: | Size: 245449 | Author: yanshiwo1@163.com | Hits:

[VHDL-FPGA-Verilog] NO_2_ColorLight

Description: 这个是vhdl的彩灯实例程序，里面涵盖了48种的彩灯变化，通过了maxplus的验证，并且在机上实验通过-this is the Lantern example VHDL procedures inside covers 48 species of Carnival changes adopted maxplus certification, and the plane through experiments
Platform: | Size: 103424 | Author: 何蓥 | Hits:

[VHDL-FPGA-Verilog] pulse_change

Description: 用vhdl实现脉冲宽度可控的一简单程序仿真环境MAXPLUS--use VHDL to achieve controllable pulse width of a simple process simulation environment Segments-
Platform: | Size: 183296 | Author: dm | Hits:

[VHDL-FPGA-Verilog] 100个vhdl设计例子

Description: 内附多路选择器，74系列芯片VHDL源码，加法器，FIR，比较器等大量例子，对初学VHDL语言很有好处。可用maxplus，quartus，synplicity等综合软件进行调试-contains multiple-choice, 74 chips VHDL source code, the adder, FIR, comparators, etc. are plenty of examples for beginners VHDL very good. Available maxplus, Quartus, synplicity integrated software debugging
Platform: | Size: 233472 | Author: 杰轩 | Hits:

[VHDL-FPGA-Verilog] 4x4的数据选择器

Description: 用vhdl的4x4的数据选择器，在maxplusII下编译、仿真通过。是构成大型数字电路的重要部件。适合vhdl初学者分析学习。-4x4 with the VHDL data selectors, under the maxplusII compiler, simulation through. Yes constitute large-scale digital circuits important components. VHDL Analysis for beginners to learn.
Platform: | Size: 3072 | Author: roya | Hits:

[VHDL-FPGA-Verilog] 8倍频vhdl

Description: 该文件可用vhdl语言实现时钟8倍频，运行环境可在maxplus2和ise的仿真软件上-the document available VHDL Language 8 clock frequency, the operating environment and ideally maxplus2 simulation software
Platform: | Size: 1024 | Author: 罗兵武 | Hits:

[VHDL-FPGA-Verilog] FIRvhdl

Description: 用vhdl实现一个fir滤波器设计要求： 1．最小阻带衰减-30db。 2．带内波动小于1db． 3．用MATLIB与MAXPLUS2联合设计与仿真-use VHDL to achieve a fir filter design requirements : 1. The smallest stop band attenuation- 30dB. 2. With fluctuating within less than 1DB. 3. With MATLIB with MAXPLUS2 joint design and simulation
Platform: | Size: 3072 | Author: 达闻西 | Hits:

[VHDL-FPGA-Verilog] FPGAprogram1

Description: 常用键盘消抖模块——VHDL源程序！！！对vhdl编程的人具有很大的帮助，不可不看 -common keyboard Consumers shaking module-- VHDL source! ! ! Right VHDL programming of great help, I can not s
Platform: | Size: 2048 | Author: 许嘉 | Hits:

[VHDL-FPGA-Verilog] EDAchuzuchejijia

Description: 在本示例程序中，用VHDL语言实现了出租车的记价功能，在Maxplus2环境下编写，可通过cpld下载板来验证程序。在压缩包中附有示例的目的，方法和仿真时序图，是学习VHDL好例子。-in this sample program, using VHDL of the entry price of a taxi function, in preparation FLEX10K environment, through cpld download plate to the verification process. The compression package with the purpose of example, the simulation methods and timing diagrams, is a good example to learn VHDL.
Platform: | Size: 339968 | Author: bkd | Hits:

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[Other resource] 100个vhdl设计例子

[Other resource] VHDL-Clock

[Other] vhdl

[Software Engineering] maxplus

[VHDL-FPGA-Verilog] 用VHDL编写的带报错和暂停控制功能的交通灯

[VHDL-FPGA-Verilog] NO_2_ColorLight

[VHDL-FPGA-Verilog] pulse_change

[VHDL-FPGA-Verilog] 100个vhdl设计例子

[VHDL-FPGA-Verilog] 4x4的数据选择器

[VHDL-FPGA-Verilog] 8倍频vhdl

[VHDL-FPGA-Verilog] FIRvhdl

[VHDL-FPGA-Verilog] FPGAprogram1

[VHDL-FPGA-Verilog] EDAchuzuchejijia

[VHDL-FPGA-Verilog] VHDL-Clock

[Other] VHDL-FPGA-clock

[VHDL-FPGA-Verilog] cabine

[VHDL-FPGA-Verilog] clock_VHDl

[VHDL-FPGA-Verilog] MAXplus

[VHDL-FPGA-Verilog] MAXPLUS

[source in ebook] dff1

CodeBus www.codebus.net

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

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Search list

[Other resource] 100个vhdl设计例子

[Other resource] VHDL-Clock

[Other] vhdl

[Software Engineering] maxplus

[VHDL-FPGA-Verilog] 用VHDL编写的带报错和暂停控制功能的 交通灯

[VHDL-FPGA-Verilog] NO_2_ColorLight

[VHDL-FPGA-Verilog] pulse_change

[VHDL-FPGA-Verilog] 100个vhdl设计例子

[VHDL-FPGA-Verilog] 4x4的数据选择器

[VHDL-FPGA-Verilog] 8倍频vhdl

[VHDL-FPGA-Verilog] FIRvhdl

[VHDL-FPGA-Verilog] FPGAprogram1

[VHDL-FPGA-Verilog] EDAchuzuchejijia

[VHDL-FPGA-Verilog] VHDL-Clock

[Other] VHDL-FPGA-clock

[VHDL-FPGA-Verilog] cabine

[VHDL-FPGA-Verilog] clock_VHDl

[VHDL-FPGA-Verilog] MAXplus

[VHDL-FPGA-Verilog] MAXPLUS

[source in ebook] dff1

CodeBus www.codebus.net

[VHDL-FPGA-Verilog] 用VHDL编写的带报错和暂停控制功能的交通灯