Search - vhdl source code for ADC

[VHDL-FPGA-Verilog] vhdl程序例子

Description: vhdl程序源代码，包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC Arithmetic等-VHDL source code, including Combinational Logic Counters Shift Registers State Machines Registers Memory Systems ADC and DAC Arithmetic etc.
Platform: | Size: 168960 | Author: 王力 | Hits:

[VHDL-FPGA-Verilog] VHDLSourceCodeForADConvertersadv7123

Description: vhdl源码for模数转换器之七 vhdl源码for模数转换器之七-VHDL source code for the seven ADC ADC VHDL source code for the seven
Platform: | Size: 3072 | Author: rui | Hits:

[VHDL-FPGA-Verilog] VHDLSourceCodeForADConverterak4380

Description: 一个adc的vhdl源码之七一个adc的vhdl源码之七(第一个压缩包含5个)-VHDL source code of a adc 71 adc of the VHDL source of the seven (the first compression contains 5)
Platform: | Size: 5120 | Author: rui | Hits:

[VHDL-FPGA-Verilog] ads7825

Description: use this source code for interface to adc ads7825
Platform: | Size: 11264 | Author: Harry Sunaryo | Hits:

[SCM] CPLDMSP430

Description: 本范例的四大用途： 1.DDS AD9856的应用，敢说是国内首创，从原理图到PCB到源代码全部验证通过； 2.CPLD EPM240的学习板：典型的使用CPLD做高速数据采集（ADS825是40MSPS的ADC）； 3.MSP430F149的学习板； 4.高速ADC与DDS联合应用的范例板 -The four purposes of this example: 1.DDS AD9856 application, say is the first, from the schematic to the PCB to the source code for all verified 2.CPLD EPM240 learning board: the use of CPLD to do the typical high-speed data acquisition (ADS825 is 40MSPS the ADC) 3.MSP430F149 learning board 4. high-speed ADC and DDS example of combined board
Platform: | Size: 4074496 | Author: jike | Hits:

[VHDL-FPGA-Verilog] axi_jesd204b

Description: ADI JESD204接口的ADC与Xilinx FPGA接口IP，包含Verilog和VHDL源代码，AXI总线接口，ADC串行控制接口-ADI IP for interfacing JESD204 ADC to Xilinx FPGA, include Verilog/VHDL source code, AXI interface and serial config interface
Platform: | Size: 77824 | Author: Eddie | Hits:

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