Description: 介绍了viterbi译码器的编解码器的设计,包括decoder.v,encoder.v.control.v,ram.v等,压缩 包里面有pdf说明-Introduced a viterbi decoder codec design, including decoder.v, encoder.v.control.v, ram.v and so on, there are pdf compression package description Platform: |
Size: 62464 |
Author:yaoyongshi |
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Description: Viterbi译码器的FPGA实现代码,来在国外大学论坛.-Viterbi decoder implementation of the FPGA code to the Forum at foreign universities. Platform: |
Size: 8192 |
Author:蔡敏 |
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Description: verilog程序,实现了(2,1,4)卷积码编码,和基于回溯算法的维特比译码器-verilog program to achieve the (2,1,4) convolutional code encoding, and algorithm based on the back of the Viterbi decoder Platform: |
Size: 3072 |
Author:xiongherui |
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Description: paper format that includes Viterbi Decoder complete VHDL code for the document. Nh format paper format that include s Viterbi Decoder complete VHDL code for the document. Nh format paper format that includes Viterbi Decoder complete VHDL code for the document. Nh format -paper format that includes Viterbi Decoder complete VHDL code for the document. Nh format paper format that includes Viterbi Decoder complete VHDL code for the document. Nh format paper format that includes Viterbi Decoder complete VHDL code for the document. Nh format paper format that includes Viterbi Decoder complete VHDL code for the document. Nh format Platform: |
Size: 431104 |
Author:awa |
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