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[Software Engineering] testben DL : 0: 这是由xilin公司提供的测试文档，对于用XILINX公司的CPLD/FPGA的用户来说挺不错的。-xilin provided by the test documents, XILINX used for the CPLD / FPGA users quite well.
Update : 2008-10-13 Size : 192.46kb Publisher : 苏晓利
[File Operate] Xilinxconfigure DL : 0: Xilin公司的FPGA配置说明书，pdf格式-Xilin the FPGA configuration brochures, pdf format
Update : 2008-10-13 Size : 345.39kb Publisher : 张竟
[Other resource] clock DL : 0: 利用xilin实验仪完成一个可以计时的数字时钟，显示范围位00.00～59.59，且该时钟应该具有暂停计时，清零灯功能。
Update : 2008-10-13 Size : 78.55kb Publisher : haolj
[ActiveX/DCOM/ATL] xilin DL : 0: This directory contains the following: [fajd.m] The FAJD algorithm for finding the approximate general (non-orthogonal) joint diagonalizer of a set of matrices. [test.m] A routine to demonstrates the way to call FAJD after generating a set of target-matrices. [average_performance.m] A routine that compares the average performance of FAJD with different fixed processing parameters. [sir.m] A function that calculates the signal to interference ratio (SIR) of a combined demixing-mixing matrix. Contributed by Xi-Lin Li (e-mail: li-xl04@mails.tsinghua.edu.cn). Comments, bug reports, questions and suggestions are welcome.
Update : 2008-10-13 Size : 3.54kb Publisher : 薛耀斌
[Embeded-SCM Develop] ise_9.01_xilinx DL : 0: xilin,ise_9.01的使用，对于初学者来说是不错的教程。
Update : 2008-10-13 Size : 7.29mb Publisher : 王杉
[Books] Foundation_Chinese DL : 0: xilinx完整的教程，foundation-Xilinx complete directory foundation
Update : 2025-02-17 Size : 2.79mb Publisher : 啊飞
[VHDL-FPGA-Verilog] PLD与8051接口的参考设计 Xilinx提供_vhdl DL : 0: PLD与8051接口的参考设计 Xilinx提供的verilog源代码-PLD 8051 interface with the Xilinx Reference Design for the Verilog source code
Update : 2025-02-17 Size : 59kb Publisher : 陈旭
[VHDL-FPGA-Verilog] USB控制器VHDL程序 DL : 0: USB控制器VHDL程（usb_xilinx_vhdl）,用XILINX公司的FPGA实现-VHDL-USB controller (usb_xilinx_vhdl) XILINX FPGA
Update : 2025-02-17 Size : 59kb Publisher : 夏社
[VHDL-FPGA-Verilog] ddr_verilog_xilinx DL : 0: 该程序是在xilinx的FPGA上实现DDR_SDRAM接口，程序是用verylog语言写的-that the procedure was in Xilinx FPGA to achieve DDR_SDRAM interface, procedures used to write the language verylog
Update : 2025-02-17 Size : 23kb Publisher : 冯伟
[Software Engineering] testben DL : 0: 这是由xilin公司提供的测试文档，对于用XILINX公司的CPLD/FPGA的用户来说挺不错的。-xilin provided by the test documents, XILINX used for the CPLD/FPGA users quite well.
Update : 2025-02-17 Size : 192kb Publisher : 苏晓利
[File Format] Xilinxconfigure DL : 0: Xilin公司的FPGA配置说明书，pdf格式-Xilin the FPGA configuration brochures, pdf format
Update : 2025-02-17 Size : 345kb Publisher : 张竟
[Embeded-SCM Develop] xilinx DL : 0: xilinx 开发板原理图,里面含有pcb图,自己完全可以做一块来玩,不用买别人的,很省钱,又锻炼了自己.-Xilinx development board schematic diagram, which contains pcb chart their own can make a play, do not buy someone else
Update : 2025-02-17 Size : 298kb Publisher : 萧勇
[VHDL-FPGA-Verilog] clock DL : 0: 利用xilin实验仪完成一个可以计时的数字时钟，显示范围位00.00～59.59，且该时钟应该具有暂停计时，清零灯功能。-Xilin completed experiment using a digital time clock, indicating the scope of digital 00.00 ~ 59.59, and the clock should have suspended time, Clear Lantern feature.
Update : 2025-02-17 Size : 79kb Publisher : haolj
[ActiveX/DCOM/ATL] xilin DL : 0: This directory contains the following: [fajd.m] The FAJD algorithm for finding the approximate general (non-orthogonal) joint diagonalizer of a set of matrices. [test.m] A routine to demonstrates the way to call FAJD after generating a set of target-matrices. [average_performance.m] A routine that compares the average performance of FAJD with different fixed processing parameters. [sir.m] A function that calculates the signal to interference ratio (SIR) of a combined demixing-mixing matrix. Contributed by Xi-Lin Li (e-mail: li-xl04@mails.tsinghua.edu.cn). Comments, bug reports, questions and suggestions are welcome.
Update : 2025-02-17 Size : 3kb Publisher : 薛耀斌
[Embeded-SCM Develop] ise_9.01_xilinx DL : 0: xilin,ise_9.01的使用，对于初学者来说是不错的教程。-xilin, ise_9.01 use, for beginners is a good tutorial.
Update : 2025-02-17 Size : 7.29mb Publisher : 王杉
[VHDL-FPGA-Verilog] uart16450 DL : 0: uart 16450合集,xilin altera lattice-collection of uart controller 16450
Update : 2025-02-17 Size : 803kb Publisher : jhv
[Other] pcie_blk_plus_ds551 DL : 0: Xilin PCI-E使用手册，对PCI-E开发非常有帮助-Xilinx PCI-E Userguide
Update : 2025-02-17 Size : 326kb Publisher : billy
[VHDL-FPGA-Verilog] logic_handbook DL : 0: Programmable Logic Design Quick Start Guide from Xilin Co.
Update : 2025-02-17 Size : 2.73mb Publisher : ASURA
[Embeded-SCM Develop] Xilin DL : 0: Xilinx时序约束培训教材,主要介绍FPGA的时序约束。-Xilinx
Update : 2025-02-17 Size : 1.2mb Publisher : nick
[matlab] Hausdorf_Matching DL : 0: Line Based Recognition using a Multidimensional Hausdorff Distance _______ DESCRIPTION _______ Matching the image with its rotated and scaled version using 4 dimensional hausdorff measure. ___REFERENCE___ Paper 1: Line Based Recognition using a Multidimensional Hausdorff Distance Xilin Yi , Octavia I. Camps. - IEEE Trans. on Patt. Ana. and Mac. Int. - Vol:21 - No:9- Line Based Recognition using a Multidimensional Hausdorff Distance _______ DESCRIPTION _______ Matching the image with its rotated and scaled version using 4 dimensional hausdorff measure. ___REFERENCE___ Paper 1: Line Based Recognition using a Multidimensional Hausdorff Distance Xilin Yi , Octavia I. Camps.- IEEE Trans. on Patt. Ana. and Mac. Int.- Vol:21- No:9
Update : 2025-02-17 Size : 77kb Publisher : Mehmet

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