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[Other resource] ZBT SRAM控制器参考设计_verilog_xilinx

Description: ZBT SRAM控制器参考设计，xilinx提供，（ZBT SRAM是一种高速同步SRAM）-ZBT SRAM controller reference design for Xilinx (ZBT SRAM, a high-speed synchronous SRAM)
Platform: | Size: 36470 | Author: 陈旭 | Hits:

[Other resource] ZBT SRAM控制器参考设计vhdl_xilinx

Description: ZBT SRAM控制器参考设计，xilinx提供的VHDL源代码-ZBT SRAM controller reference design for Xilinx VHDL source code
Platform: | Size: 9220 | Author: 陈旭 | Hits:

[Other resource] System09

Description: BurchED B5-X300 Spartan2e using XC2S300e device Top level file for 6809 compatible system on a chip Designed with Xilinx XC2S300e Spartan 2+ FPGA. Implemented With BurchED B5-X300 FPGA board, B5-SRAM module, B5-CF module and B5-FPGA-CPU-IO module-BurchED B5 - X300 Spartan2e using XC2S300e Top level device file for 6809 compatible syste m on a chip Designed with Xilinx XC2S300e Sparta n 2 FPGA. Implemented With BurchED B5 - X300 FPGA board, B5-SRAM module, B5-CF module and B5 - FPGA-CPU-IO module
Platform: | Size: 610666 | Author: 陈朋 | Hits:

[Embeded-SCM Develop] ATmega128

Description: ATmega128实验板 简要介绍： 主要芯片： CPU:ATmega128L SRAM:SR61L256BS-8 CPLD:XILINX XC95144XL SFLASH:AT45DB081B ETHERNET:CS8900A USB:PDIUSBD12 LCD:122x32 LMC62_095_M POWER:LM2596S-3.3 RS232:MAX3232 软件：RS232,SRAM,CPLD调试通过，uCosII可以运行，ethernet部分没有完成，usb完成了一部分。 开发环境： WINAVR,ISE6,AVR Studio
Platform: | Size: 9936705 | Author: yhui | Hits:

[VHDL-FPGA-Verilog] ZBT SRAM控制器参考设计_verilog_xilinx

Description: ZBT SRAM控制器参考设计，xilinx提供，（ZBT SRAM是一种高速同步SRAM）-ZBT SRAM controller reference design for Xilinx (ZBT SRAM, a high-speed synchronous SRAM)
Platform: | Size: 35840 | Author: 陈旭 | Hits:

[VHDL-FPGA-Verilog] ZBT SRAM控制器参考设计vhdl_xilinx

Description: ZBT SRAM控制器参考设计，xilinx提供的VHDL源代码-ZBT SRAM controller reference design for Xilinx VHDL source code
Platform: | Size: 9216 | Author: 陈旭 | Hits:

[VHDL-FPGA-Verilog] System09

Description: BurchED B5-X300 Spartan2e using XC2S300e device Top level file for 6809 compatible system on a chip Designed with Xilinx XC2S300e Spartan 2+ FPGA. Implemented With BurchED B5-X300 FPGA board, B5-SRAM module, B5-CF module and B5-FPGA-CPU-IO module-BurchED B5- X300 Spartan2e using XC2S300e Top level device file for 6809 compatible syste m on a chip Designed with Xilinx XC2S300e Sparta n 2 FPGA. Implemented With BurchED B5- X300 FPGA board, B5-SRAM module, B5-CF module and B5- FPGA-CPU-IO module
Platform: | Size: 610304 | Author: 陈朋 | Hits:

[VHDL-FPGA-Verilog] zbt_verilog_xilinx

Description: ZBT SRAM控制器参考设计，ZBT SRAM是一种高速同步SRAM）-ZBT SRAM controller reference design, ZBT SRAM is a high-speed synchronous SRAM)
Platform: | Size: 7168 | Author: shang808 | Hits:

[Embeded-SCM Develop] ATmega128

Description: ATmega128实验板 简要介绍： 主要芯片： CPU:ATmega128L SRAM:SR61L256BS-8 CPLD:XILINX XC95144XL SFLASH:AT45DB081B ETHERNET:CS8900A USB:PDIUSBD12 LCD:122x32 LMC62_095_M POWER:LM2596S-3.3 RS232:MAX3232 软件：RS232,SRAM,CPLD调试通过，uCosII可以运行，ethernet部分没有完成，usb完成了一部分。 开发环境： WINAVR,ISE6,AVR Studio-ATmega128 board briefly introduce the experiment: the main chips: CPU: ATmega128L SRAM: SR61L256BS-8 CPLD: XILINX XC95144XL SFLASH: AT45DB081B ETHERNET: CS8900A USB: PDIUSBD12 LCD: 122x32 LMC62_095_M POWER: LM2596S-3.3 RS232: MAX3232 software: RS232, SRAM, CPLD Debug through, uCosII can run, ethernet part not completed, usb part completed. Development Environment: WINAVR, ISE6, AVR Studio
Platform: | Size: 9936896 | Author: yhui | Hits:

[VHDL-FPGA-Verilog] 03.EDK8.2

Description: 使用xilinx virtex4芯片，设计环境为EDK，其中包含uart,片外sram操作，flash操作，DDR SDRAM操作，MAC自发自收，audio，video等试验-Xilinx virtex4 use chip design environment for the EDK, which contains the uart, chip sram operation, flash operation, DDR SDRAM operation, MAC spontaneous self-admission, audio, video and other tests
Platform: | Size: 22821888 | Author: 肖姗姗 | Hits:

[SCM] ATmega128

Description: 简要介绍： 主要芯片： CPU:ATmega128L SRAM:SR61L256BS-8 CPLD:XILINX XC95144XL SFLASH:AT45DB081B ETHERNET:CS8900A USB:PDIUSBD12 LCD:122x32 LMC62_095_M POWER:LM2596S-3.3 RS232:MAX3232 软件：RS232,SRAM,CPLD调试通过，uCosII可以运行，ethernet部分没有完成，usb完成了一部分。 -HD MP3 USE MEGA128
Platform: | Size: 11170816 | Author: shi | Hits:

[VHDL-FPGA-Verilog] IS61WV51216BLL

Description: 备注：使用的是VeriLog HDL语言 软件环境xilinx ISE 10.1，硬件：高教仪EXCD-1FPGA电路板。FPGA信号：spartan-3e . 功能编写硬件描述性语言实现FPGA对板上外设SRAM IS61WV51216BLL的读写，通过串口发送到上位机上，使用串口助手显示读取的数据。-Note: Use the VeriLog HDL language software environment xilinx ISE 10.1, hardware: Higher Miriam EXCD-1FPGA circuit boards. FPGA Signal: spartan-3e. Write functional hardware description language implementation of on-board peripherals SRAM IS61WV51216BLL FPGA to read and write, sent to the host computer through the serial port, use the serial Assistant displays the data read.
Platform: | Size: 5120 | Author: 李钿 | Hits:

[VHDL-FPGA-Verilog] sram_simul

Description: Simple simulation example of SRAM in VHDL and Xilinx ISE
Platform: | Size: 909312 | Author: Vaclavpe | Hits:

[VHDL-FPGA-Verilog] SRAM

Description: 使用Verilog语言编写的SRAM读写程序,不用添加IP核,在Xilinx Spartan-6上运行通过,是很好的Verlog程序-SRAM using Verilog language literacy program, do not add the IP core in Xilinx Spartan-6 run through, is a very good program Verlog
Platform: | Size: 9216 | Author: 于洋 | Hits:

[Software Engineering] XILINX-FPGA--parallel-interface

Description: XILINX FPGA 模拟SRAM借口程序-XILINX FPGA SRAM interface simulation program
Platform: | Size: 3072 | Author: zh | Hits:

[LabView] SRAM

Description: Verilog TUTORIAL for beginners. We had earlier published a Verilog tutorial that made use of the Xilinx ISE Simulator.
Platform: | Size: 4096 | Author: kimluan | Hits:

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