Search - xilinx fft

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[Mathimatics-Numerical algorithms] 81i_radix2_xfft1024_v3_2 DL : 0: xilinx FFT using ip core project navigator-xilinx ip using FFT core project navigator
Update : 2008-10-13 Size : 1.37mb Publisher : ningchang
[VHDL-FPGA-Verilog] FPGA 做的音频信号分析仪 DL : 0: 使用 Xilinx 的 FPGA 做的音频信号分析仪,附详细说明及 VHDL 源程序.
Update : 2011-06-30 Size : 16.39mb Publisher : xyz543
[Internet-Network] Xilinx FPGA设计进阶(提高篇） DL : 0: Xilinx FPGA设计进阶(提高篇）-advanced Xilinx FPGA design (Advancement Part 1)
Update : 2025-02-17 Size : 2.35mb Publisher : 郑忡
[Documents] Xilinx-FPGApin DL : 0: Xilinx-FPGA器件管脚说明-Xilinx- FPGA pin description well good
Update : 2025-02-17 Size : 6kb Publisher : 黄名
[VHDL-FPGA-Verilog] 1024_FFT DL : 0: 1024点FFT快速傅立叶变换，包含说明文档和VHDL源代码，16位输入/输出，带DMA功能，xilinx的ip-1024-point FFT fast Fourier transform, and includes documentation, VHDL source code, 16 input/output, with DMA function, the ip xilinx
Update : 2025-02-17 Size : 615kb Publisher : 刘超
[ARM-PowerPC-ColdFire-MIPS] FFT_IP DL : 0: Xilinx FPGA 的IP核，实现FFT功能的-Xilinx FPGA IP core, FFT function
Update : 2025-02-17 Size : 410kb Publisher : zxinkai
[Mathimatics-Numerical algorithms] 81i_radix2_xfft1024_v3_2 DL : 0: xilinx FFT using ip core project navigator-xilinx ip using FFT core project navigator
Update : 2025-02-17 Size : 1.37mb Publisher : ningchang
[VHDL-FPGA-Verilog] ip_fft128 DL : 0: 128点fft的IP核vhdl源代码，另有其控制代码。-128 point fft s IP core VHDL source code, while its control code.
Update : 2025-02-17 Size : 7kb Publisher : 戈立军
[VHDL-FPGA-Verilog] cordic DL : 0: cordic verilog 程序及仿真结果 8级流水线-cordic verilog simulation results procedures and eight lines
Update : 2025-02-17 Size : 1kb Publisher : elisen
[Other] VHDL_Core_for_1024_Point_Radix_4_FFT_Computation. DL : 0: This paper shows the development of a 1024-point radix-4 FFT VHDL core for applications in hardware signal processing, targeting low-cost FPGA technologies. The developed core is targeted into a Xilinx庐 Spartan鈩?3 XC3S200 FPGA with the inclusion of a VGA display interface and an external 16-bit data acquisition system for performance evaluation purposes. Several tests were performed in order to verify FFT core functionality, besides the time performance analysis highlights the core advantages over commercially available DSPs and Pentium-based PCs. The core is compared with similar third party IP cores targeting resourceful FPGA technologies. The novelty of this work is to provide a lowcost, resource efficient core for spectrum analysis applications.
Update : 2025-02-17 Size : 446kb Publisher : alex
[VHDL-FPGA-Verilog] studyFFTcore DL : 0: 调用FPGA的IP核实现FFT运算，在xilinx的vertex4sx55FPGA的实现-Call FPGA implementation of the IP core FFT computation, in the Xilinx implementation of the vertex4sx55FPGA
Update : 2025-02-17 Size : 1.23mb Publisher : 徐成发
[Linux-Unix] Linux_bc DL : 0: 对vga接口做了详细的介绍，并且有一 ·三段式Verilog的IDE程序，但只有DMA ·电子密码锁，基于fpga实现，密码正 ·IIR、FIR、FFT各模块程序设计例程， ·基于逻辑工具的以太网开发，基于逻 ·自己写的一个测温元件（ds18b20）的 ·光纤通信中的SDH数据帧解析及提取的 ·VHDL Programming by Example（McGr ·这是CAN总线控制器的IP核，源码是由 ·FPGA设计的SDRAM控制器，有仿真代码 ·xilinx fpga 下的IDE控制器原代码, ·用verilog写的，基于查表法实现的LO ·精通verilog HDL语言编- up:in STD_LOGIC down:in STD_LOGIC run_stop:in STD_LOGIC wai_t: in std_logic_vector(2 downto 0) lift:in std_logic_vector(2 downto 0) ladd: out std_logic_vector(1 downto 0) ) end control
Update : 2025-02-17 Size : 17.82mb Publisher : liuzhou
[VHDL-FPGA-Verilog] fft_gen DL : 0: FFT vhdl generic: I m new to vhdl, and I tried to use xilinx fft core, but when I try to simulate it in test bench using ise simulator, I get zero results. here is what I do: 1- from core generator I choose fft core and create .vhd & .vho & .xco files. 2- I add the .xco & .vhd files to my project. 3- I create a new vhdl source as a wrapper to the core and add the code from the .vho files where it exactly says, and take the ports of the component and add it to the entity of the wrapper file.-FFT vhdl generic: I m new to vhdl, and I tried to use xilinx fft core, but when I try to simulate it in test bench using ise simulator, I get zero results. here is what I do: 1- from core generator I choose fft core and create .vhd & .vho & .xco files. 2- I add the .xco & .vhd files to my project. 3- I create a new vhdl source as a wrapper to the core and add the code from the .vho files where it exactly says, and take the ports of the component and add it to the entity of the wrapper file.
Update : 2025-02-17 Size : 6kb Publisher : Jayesh
[VHDL-FPGA-Verilog] FFT DL : 0: fft implementation in fpga using vhdl xilinx
Update : 2025-02-17 Size : 874kb Publisher : prabin
[VHDL-FPGA-Verilog] yy DL : 0: 使用XILINX公司提供的板子里面的FFT的IP核，很好用-XILINX board provided the use inside the FFT of the IP core, useful
Update : 2025-02-17 Size : 3.76mb Publisher : zhangshan
[VHDL-FPGA-Verilog] rax2 DL : 0: rax2 fft implation the fft in verilog instance and in ise of xilinx it show how to istance fft core and the port used
Update : 2025-02-17 Size : 1kb Publisher : LL
[VHDL-FPGA-Verilog] fft_2011_3_23(COMPLETE-FFT1024) DL : 0: VERILOG FFT IP核调用，以及其控制文件-VERILOG FFT IP core call, as well as its control file
Update : 2025-02-17 Size : 20.01mb Publisher : 贾斌
[VHDL-FPGA-Verilog] synth_fft DL : 0: fftprocessing can complete 256 pointsFFT.-Hardware Description Language(HDL)is an advanced electronic designmethod．After HDL was put into use，it has draw great attention and gained popularity．The design used Verilog HDL and Schematic for entry tools having good effect in the system design，Meanwhile，it adopted the core provided by Xilinx／nc. improving the design efficiency．The whole design which is implemented inXC2S600E device relied on ISE and advanced hierarchy design mind．Furthermore，it is simulated and verified．The frequency attains to 40.64MHz．this paper aims at demonstration the applying FPGA to FFT signal processing can complete 256 pointsFFT.
Update : 2025-02-17 Size : 55kb Publisher : zzy
[Documents] fft DL : 0: fft AND ifft is designed for OFDM application using CORDIC algorithm and implemented in XILINX FPGA.
Update : 2025-02-17 Size : 202kb Publisher : pert
[Algorithm] FFT DL : 0: FFT的经典实现，三重循环的蝶形运算，适合于硬件实现的软件版本，在Xilinx的Vivado仿真器下编译通过-Classic implementation of FFT software version is suitable for hardware implementation in Xilinx Vivado emulator compiled by
Update : 2025-02-17 Size : 16kb Publisher : 任翔

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