Search - xilinx sata

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[Other] spi DL : 0: spi接口的vhdl实现，所用器件和ip为xilinx的-spi interface VHDL realize, by ip for Xilinx devices and the
Update : 2025-02-17 Size : 2.97mb Publisher : 杨子树
[VHDL-FPGA-Verilog] xilnx_sata DL : 0: xilinx 的sata解决方案，已对其中内容作了修改，可实现综合-sata the xilinx solutions have been made to amend the contents of which can be used
Update : 2025-02-17 Size : 64kb Publisher : 张峰
[VHDL-FPGA-Verilog] aips7108.tar DL : 0: SATA 仿真模型 SATA 仿真模型-Simulation Model SATA SATA SATA simulation model simulation model
Update : 2025-02-17 Size : 16.83mb Publisher : 罗宇平
[VHDL-FPGA-Verilog] xapp870[1] DL : 0: xilinx v5上sata link 初始化文档-Xilinx Sata link initilization guide
Update : 2025-02-17 Size : 1.11mb Publisher : zhangxinxin
[VHDL-FPGA-Verilog] SATA-Connectivity-solutions-for-Xilinx-FPGAs.pdf. DL : 0: This gives an overview over the Serial ATA (SATA) protocol and the implications when integrating SATA into an FPGA-based programmable system. Besides details of the different protocol layers, we will discuss the hardware and software components for building a complete, reliable, high-performance SATA solution by utilizing a design platform from Missing Link Electronics (MLE).
Update : 2025-02-17 Size : 381kb Publisher : mancity
[Crack Hack] Encryption-SATA-IP-Based-on-FPGA DL : 0: 本文首先分析了目前常用的硬盘数据加密方法，并在比较各种加密方案的基础上给出了基于FPGA的加解密SATA IP设计方案。本文介绍设计SATA IP相关的基础知识，包括SATA的体系结构。本sata IP已在Xilinx spartan-6系列上实现并产品化，具有低成本优势，且可以根据用户意愿更换加密算法和使用私有的加密算法。本文还论述了加密SATA IP的各种应用前景。-This paper firstly analyzes several common ways of Hard Disk data protection, and then presents the design scheme of Encryption/Decryption SATA IP based on FPGA after comparison. Because of the common use of SATA2.0 interface, this paper then introduces the system structure of SATA2.0 protocol. The sata IP has been achieved and the products on the Xilinx spartan-6 series, they has low cost advantage. This article also discusses the outlook for a variety of applications to encrypt SATA IP s.
Update : 2025-02-17 Size : 1.85mb Publisher : liuYue
[Com Port] groundhog_v_0_2 DL : 0: Groundhog implements a SATA host bus adapter.-Groundhog implements a SATA host bus adapter. This Verilog-based project creates an easy-to-use interface between a user circuit on a Xilinx FPGA and a SATA hard drive or SSD.
Update : 2025-02-17 Size : 4.4mb Publisher : spencer
[VHDL-FPGA-Verilog] xapp870 DL : 0: sata物理层，实现物理层的参考，可以借鉴一下(phy layer for sata,target is Xilinx ML505 .)
Update : 2025-02-17 Size : 63kb Publisher : lmf432502