Search - xilinx schematic

Search - xilinx schematic - List

[VHDL-FPGA-Verilog] SS7160.ZIP DL : 0: 该代码为配合7号信令模块MK50H27的cpld(xilinx 95144)的逻辑代码,其中包括了VHDL及原理图.-the code to meet on the 7th of signaling modules MK50H27 cpld (Xilinx 95144 ) logic code, which included a schematic and VHDL.
Update : 2025-02-17 Size : 704kb Publisher : 王珏
[Embeded-SCM Develop] xilinx DL : 0: xilinx 开发板原理图,里面含有pcb图,自己完全可以做一块来玩,不用买别人的,很省钱,又锻炼了自己.-Xilinx development board schematic diagram, which contains pcb chart their own can make a play, do not buy someone else
Update : 2025-02-17 Size : 298kb Publisher : 萧勇
[Other] JTAG DL : 0: XILINX AND MSP430 PCB FOR JTAG AND ORIGINAL FILES
Update : 2025-02-17 Size : 61kb Publisher : FEF
[Embeded-SCM Develop] VIRTEXIIBOARDsch DL : 0: VII板的电路原理图,学习XILINX FPGA的朋友们可以参考一下-VII of the circuit board schematic, learning XILINX FPGA friends can refer to
Update : 2025-02-17 Size : 195kb Publisher : 容斋
[Software Engineering] XILINX_sp3_sch DL : 0: XILINX公司SP3开发板原理图,包括核心板和扩展板-XILINX Corporation SP3 development board schematic diagram, including the core board and expansion board
Update : 2025-02-17 Size : 281kb Publisher : 张
[Embeded-SCM Develop] mobileram_data_sheet_hyb25 DL : 0: xilinx开发板芯片说明文档，电路原理图-Xilinx development board documentation chips, circuit schematic diagram
Update : 2025-02-17 Size : 263kb Publisher : 庞志勇
[VHDL-FPGA-Verilog] ml405_schematics DL : 0: Xilinx Virtex 4 ML405开发平台的原理图设置引脚文件的时候可以用到 -Xilinx Virtex 4 ML405 development platform schematic pin settings file can be used when
Update : 2025-02-17 Size : 509kb Publisher : 马亮
[VHDL-FPGA-Verilog] CPLDexperiment DL : 0: 本实验教程选用Xilinx公司的产品X9572，与之配套的开发软件为ISE4.1i，可进行原理图的输入和VHDL硬件描述语言的输入，并且可利用Modelsim进行功能仿真和时序仿真。-In this study, selected Xilinx tutorial products X9572, with supporting the development of software for ISE4.1i, schematic can be input and VHDL hardware description language input, and can use Modelsim functional simulation and timing simulation.
Update : 2025-02-17 Size : 571kb Publisher : bin
[Software Engineering] xst-manual-v1_3_2 DL : 0: XILINX 开发板，原理图主要由XC4000和一个8031构成-XILINX development board, mainly by the XC4000 Schematic and 8031 constitute a
Update : 2025-02-17 Size : 1.6mb Publisher : zhang
[Documents] v4 DL : 0: Xilinx公司 Virtex4 FPGA官方评估板的电路原理图和相应的PCB文件。是Virtex FPGA硬件电路设计的典范参考设计。其中，PCB文件是PADS格式。-Xilinx company official Virtex4 FPGA evaluation board circuit schematic diagram and the corresponding PCB document. Virtex FPGA is the hardware circuit design model for reference design. Which, PCB document format PADS.
Update : 2025-02-17 Size : 1.22mb Publisher : 程宣
[Other] Xilinx_usb_jtag DL : 0: Xilinx_usb_jtag 下载器原理图及程序-Download browser Xilinx_usb_jtag schematic diagram and procedure
Update : 2025-02-17 Size : 1.78mb Publisher : 姜兆刚
[Embeded-SCM Develop] xilinx_sch_PCB DL : 0: xilinx的开发板的原理图和PCB图,很有参考价值-Xilinx development board schematic and PCB map, a good reference
Update : 2025-02-17 Size : 1.06mb Publisher : 植涌
[VHDL-FPGA-Verilog] Xilinx_Basys DL : 0: xilinx公司出的FPGA开发板和原理图-The FPGA company Xilinx development board and the schematic diagram
Update : 2025-02-17 Size : 1.57mb Publisher : zhangwen
[VHDL-FPGA-Verilog] Multi_Debug_Card DL : 0: 利用Xilinx XC2C128（Xilinx CPLD）制做的台式电脑的Debug卡及原理图，对于不开机的主板，能侦测出CPU到北桥之间具体那根信号线空焊，用于快速维修不开机之主板。-The use of Xilinx XC2C128 (Xilinx CPLD) desktop computer system to do the Debug Card and schematic diagram for the motherboard does not boot, can detect the CPU to the Northbridge Flanagan signal line between the concrete and air welding, maintenance for fast boot the motherboard.
Update : 2025-02-17 Size : 1.17mb Publisher : 李德明
[VHDL-FPGA-Verilog] guard_against_theft DL : 0: 利用XC9572－PQ44（Xilinx CPLD）制作的一款家用防盗报警器的Verilog源代码及原理图，当房门打开后，15秒内若没有按下Key1,则会自动拨打设定手机号（当然，要另连接一台手机）-Using XC9572-PQ44 (Xilinx CPLD) produced by a home burglar alarm of the Verilog source code and the schematic diagram, when the door opened, within 15 seconds if there is no pressing Key1, will be set automatically dial the phone number (of course, Another connection to a mobile phone)
Update : 2025-02-17 Size : 897kb Publisher : 李德明
[VHDL-FPGA-Verilog] cable DL : 0: Schematic Diagram of XILINX III downloader cable
Update : 2025-02-17 Size : 19kb Publisher : hynix
[Embeded-SCM Develop] design DL : 0: xilinx、arm、avr、s52、altera及lattice下载线的原理图和PCB图-xilinx, arm, avr, s52, altera, and lattice download line schematic and PCB diagram
Update : 2025-02-17 Size : 357kb Publisher : fedlt 莫
[Embeded-SCM Develop] xilinxPCB DL : 0: xilinx的Virtex_4开发板的参考布线和原理图-xilinx development board of reference of Virtex_4 wiring and schematic diagram
Update : 2025-02-17 Size : 2.54mb Publisher : 杨光灿
[Embeded-SCM Develop] sp605_schematics DL : 0: XILINX spartan-6 sp605原理图，不错的参考资料-XILINX spartan-6 sp605 schematic, a good reference
Update : 2025-02-17 Size : 513kb Publisher : ls
[Embeded-SCM Develop] sp601_schematics DL : 0: XILINX spartan-6 sp601原理图，不错的参考文档-XILINX spartan-6 sp601 schematic, a good reference documentation
Update : 2025-02-17 Size : 304kb Publisher : ls

« 12 3 »