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ACCx42_AvalonST_Input
Downloaded:0
This module does pipelined accumulate operation with 42 bit int value, usually used in dsp, Proved in Altera Stratix FPGA devices
Update
: 2025-02-04
Size
: 2kb
Publisher
:
serg_86
Quadrature_MACx42_AvalonSt_Input v1.0
Downloaded:0
This module does Complex MAC based on Altera Stratix 2 DSP Blocks.
Update
: 2025-02-04
Size
: 85kb
Publisher
:
serg_86
Up_Down_Counter v1.0
Downloaded:0
FPGA Up/Down couner Module
Update
: 2025-02-04
Size
: 439kb
Publisher
:
serg_86
RGMII_RECEIVER
Downloaded:0
This module converts 4 bit DDR RGMII flow to 8 bit SDR flow, proved on Altera Cyclone 3 devices.
Update
: 2025-02-04
Size
: 1.93mb
Publisher
:
serg_86
RGMII_TRANSMITTER
Downloaded:0
This module converts 8 bit SDR flow to 4 bit DDR RGMII flow, proved on Altera Cyclone 3 devices.
Update
: 2025-02-04
Size
: 1.95mb
Publisher
:
serg_86
DSP48E1_ComplexMul
Downloaded:0
This module does Complex multiplication based on Xilinx DSP48E1 dsp block. Proved on xilinx Virtex 6 Devices
Update
: 2025-02-04
Size
: 649kb
Publisher
:
serg_86
cpu2
Downloaded:0
This is the implementation of the multi-functional pipelined CPU written on the vivado platform. It's a big job for our course experiment.
Update
: 2025-02-04
Size
: 15.33mb
Publisher
:
剑姬2
leddisplay
Downloaded:0
Modular pipelined flicker
Update
: 2025-02-04
Size
: 93kb
Publisher
:
大大大大帅哥
Term
Downloaded:0
terminal for CPU test
Update
: 2025-02-04
Size
: 10.2mb
Publisher
:
Andyyjx
keil5(1)
Downloaded:0
The method of learning to use the firmware library function to write the flow lamp and key
Update
: 2025-02-04
Size
: 21.17mb
Publisher
:
大熊猫panda11
C++。zip
Downloaded:0
c language help study
Update
: 2025-02-04
Size
: 26kb
Publisher
:
玩服打
MPU6050姿态解算STM32源码
Downloaded:1
Three algorithms of attitude calculation for mpu6050 based on STM32 code source
Update
: 2025-02-04
Size
: 10.3mb
Publisher
:
黑耀辉
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