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VHDL-FPGA-Verilog list
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round_robin
Downloaded:0
Round Robin priority arbiter
Update
: 2025-01-04
Size
: 46kb
Publisher
:
taso999
IP核的生成
Downloaded:0
The method of using IP core in FPGA is described.
Update
: 2025-01-04
Size
: 2.94mb
Publisher
:
jihan
SPI_controller
Downloaded:0
SPI controller (fpga/verilog)
Update
: 2025-01-04
Size
: 117kb
Publisher
:
taso999
基于IP核的ISE设计流程
Downloaded:0
In ISE, how to use the IP core can increase the efficiency of the program design by establishing the IP core.
Update
: 2025-01-04
Size
: 2.38mb
Publisher
:
jihan
spi master slave
Downloaded:0
SPI master slave (fpga/verilog)
Update
: 2025-01-04
Size
: 66kb
Publisher
:
taso999
Coding Files
Downloaded:0
Through this paper our attempt is to give a onetime networking solution by the means of merging the VLSI field with the networking field as now a days the router is the key player in networking domain so the focus remain
Update
: 2025-01-04
Size
: 12kb
Publisher
:
kutti
Coding files
Downloaded:0
The past several years have witnessed a rapid development in the wireless network area. So far wireless networking has been focused on high speed and long range applications. Zigbee technology was developed for a Wireles
Update
: 2025-01-04
Size
: 8kb
Publisher
:
kutti
Coding Files
Downloaded:0
We present an efficient hardware architecture design & implementation of Advanced Encryption Standard AES Rijndael cryptosystem. The AES algorithm defined by the National Institute of Standard and Technology NIST of Unit
Update
: 2025-01-04
Size
: 27kb
Publisher
:
kutti
Coding Files
Downloaded:0
Floating Point FP multiplication is widely used in large set of scientific and signal processing computation. Multiplication is one of the common arithmetic operations in these computations. A high speed floating point d
Update
: 2025-01-04
Size
: 51kb
Publisher
:
kutti
wangfei
Downloaded:0
costing system of network
Update
: 2025-01-04
Size
: 3kb
Publisher
:
月月1234
slave_control
Downloaded:0
VHDL implementation of SPI, from the machine implementation method, the realization of 32 bit transmission, one-way transmission.
Update
: 2025-01-04
Size
: 1kb
Publisher
:
许大牛
Verilog_1Gb_DDR3_G_Die
Downloaded:0
ddr3 controller, can be used to ddr3 control,high speed
Update
: 2025-01-04
Size
: 33kb
Publisher
:
aikannba
«
1
2
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.17
.18
.19
.20
.21
122
.23
.24
.25
.26
.27
...
4311
»
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