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VHDL-FPGA-Verilog list
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rs232_receiver
Downloaded:0
rs232 code to receive information from FPGA
Update
: 2017-12-13
Size
: 2.72kb
Publisher
:
nicolas29
flybird
Downloaded:0
Bird board game on the development board EGO1, a detailed module description, the use of vivdao platform
Update
: 2025-01-06
Size
: 510kb
Publisher
:
a10954
8位二进制转bcd码
Downloaded:0
b to bcd code very easy and readily to understand
Update
: 2025-01-06
Size
: 644kb
Publisher
:
ougan
rs485
Downloaded:0
communication rs232 in vhdl with clock divider, counter, buffer, rs232tx, rs232rx.
Update
: 2025-01-06
Size
: 14kb
Publisher
:
le noach
ahb_sramc_svtb
Downloaded:1
ahb bus Verilog code and sv simulation code
Update
: 2025-01-06
Size
: 81kb
Publisher
:
逐末
ahb_sramc_vtb
Downloaded:0
ahb bus Verilog code and Verilog simulation code
Update
: 2025-01-06
Size
: 30kb
Publisher
:
逐末
AMBA_VIP
Downloaded:0
AMBA bus IP Verilog code
Update
: 2025-01-06
Size
: 78kb
Publisher
:
逐末
altera_avalon_i2c
Downloaded:0
i2c master Verilog code
Update
: 2025-01-06
Size
: 11kb
Publisher
:
逐末
KEY-shuzizhong
Downloaded:0
Design key position and clock add and subtract and reset
Update
: 2025-01-06
Size
: 322kb
Publisher
:
布丁猫
程序
Downloaded:0
Measuring temperature based on 18B20 single chip, The temperature error is not more than 0.2
Update
: 2025-01-06
Size
: 36kb
Publisher
:
爱你要
gate2
Downloaded:0
the ppt for study very very good
Update
: 2025-01-06
Size
: 432kb
Publisher
:
小庆小庆
crossbar
Downloaded:0
2 master - 2 slave communication crossbar
Update
: 2025-01-06
Size
: 15kb
Publisher
:
taso999
«
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.18
.19
.20
.21
.22
123
.24
.25
.26
.27
.28
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4311
»
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