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VHDL-FPGA-Verilog list
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Motor control by using FPGA
Update : 2025-01-10 Size : 185kb Publisher : zhangchaoruo

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Code writing in Verilog HDL,to solve the problem about signed number calculation.
Update : 2025-01-10 Size : 2kb Publisher : zhangchaoruo

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Implementing sequence parity check
Update : 2025-01-10 Size : 301kb Publisher : 你好大脾气

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The realization of the 8 bit binary code a multiplication
Update : 2025-01-10 Size : 3.47mb Publisher : 威我杜尊

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Error Detection and Correction
Update : 2025-01-10 Size : 6.53mb Publisher : Tan Nguyen

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Design code and document of AD and DA based on FPGA
Update : 2025-01-10 Size : 10mb Publisher : hanchen

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SPI MASTER CPOL=1 CPHA=1
Update : 2025-01-10 Size : 7.09mb Publisher : FPGA创业者

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VGA Timing Calculator
Update : 2025-01-10 Size : 29kb Publisher : fpgamaster

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code for SATA controller, from opencore
Update : 2025-01-10 Size : 39kb Publisher : flyup1028

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the vga display method of fpga with verilog.
Update : 2025-01-10 Size : 1.79mb Publisher : vinsonwu

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implement a musis player
Update : 2025-01-10 Size : 1kb Publisher : long2234

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The project was completed by myself about two months ago. I think it will be useful for traffic control system.But there are many points needed to be improved. If someone can help me ,please contact me.
Update : 2025-01-10 Size : 2.55mb Publisher : 沈浩
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