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VHDL-FPGA-Verilog list
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10_rom_test
Downloaded:0
ROM IP core configuration, as well as test files, suitable for beginners to use.
Update
: 2025-01-10
Size
: 4.04mb
Publisher
:
声声不洗
EGO1快速上手指南v1224
Downloaded:0
EGO1 Quick Start Guide
Update
: 2025-01-10
Size
: 2.91mb
Publisher
:
杨云霄
Vedic_Vhdl
Downloaded:0
implementation of vedic mulitplier on nexys3 fpga board
Update
: 2025-01-10
Size
: 602kb
Publisher
:
Naveen448
help_lib
Downloaded:1
1.JESD204B protocol 2.Xilinx JESD204B PHY core manual 3.Xilinx JESD204B rx_tx core manual 7.1 4.Xilinx JESD204B rx_tx core manual 7.2 5.verilog to achieve serial transmission
Update
: 2025-01-10
Size
: 6.69mb
Publisher
:
Nanke42
adc
Downloaded:0
Using Verilog hardware description language written in AD sampling module, I hope useful for everyone
Update
: 2025-01-10
Size
: 6.47mb
Publisher
:
ET@AF
Verilog_Ip_PLL
Downloaded:0
Using Verilog hardware description language written in the PLL call program, I hope to help you!
Update
: 2025-01-10
Size
: 6.08mb
Publisher
:
ET@AF
A4_Key1
Downloaded:0
Using Verilog hardware description language to write the key circuit module, I hope to help you!
Update
: 2025-01-10
Size
: 2.85mb
Publisher
:
ET@AF
A4_Beep
Downloaded:0
Using Verilog hardware description language to write the key circuit module, I hope to help you!
Update
: 2025-01-10
Size
: 3.11mb
Publisher
:
ET@AF
project_ALU
Downloaded:0
4-bit ALU for adding and subtracting 4 bit numbers. It displays the output on the sevensegment display
Update
: 2025-01-10
Size
: 600kb
Publisher
:
freaktopus
add_1p
Downloaded:0
Adder implementation program for FPGA
Update
: 2025-01-10
Size
: 1kb
Publisher
:
cxtisme
add_2p
Downloaded:0
Adder implementation program for FPGA
Update
: 2025-01-10
Size
: 1kb
Publisher
:
cxtisme
add_3p
Downloaded:0
Adder implementation program for FPGA
Update
: 2025-01-10
Size
: 1kb
Publisher
:
cxtisme
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