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VHDL-FPGA-Verilog list
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The state machine implements traffic light control
Update : 2025-01-13 Size : 256kb Publisher : 何婷

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The VHDL language implements the digital tube dynamic display
Update : 2025-01-13 Size : 447kb Publisher : 何婷

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FPGA digital signal processing principle and method routines
Update : 2025-01-13 Size : 4.68mb Publisher : 何婷

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led display
Update : 2025-01-13 Size : 1kb Publisher : hdwahfi

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led water
Update : 2025-01-13 Size : 1kb Publisher : hdwahfi

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convert serial to parallel
Update : 2025-01-13 Size : 1kb Publisher : hdwahfi

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Using Hardware Description Language Verilog HDL written to achieve dynamic scanning display code.
Update : 2025-01-13 Size : 1kb Publisher : hdwahfi

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Using Hardware Description Language Verilog HDL written with peripheral buzzer to achieve fixed music.
Update : 2025-01-13 Size : 2kb Publisher : hdwahfi

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10010 sequence detector based on Verilog hdl.
Update : 2025-01-13 Size : 266kb Publisher : hdwahfi

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rapidio altera
Update : 2025-01-13 Size : 244kb Publisher : 朱明明

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Decoder and encoder for the serial communication
Update : 2025-01-13 Size : 197kb Publisher : Diego

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A simple single port ram based on the synchronization fifo. Can only support write-only or read-only.
Update : 2025-01-13 Size : 1kb Publisher : 刘宇洋
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