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VHDL-FPGA-Verilog list
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traffic_control
Downloaded:0
The state machine implements traffic light control
Update
: 2025-01-13
Size
: 256kb
Publisher
:
何婷
led_flsah
Downloaded:0
The VHDL language implements the digital tube dynamic display
Update
: 2025-01-13
Size
: 447kb
Publisher
:
何婷
FPGA-DSP
Downloaded:0
FPGA digital signal processing principle and method routines
Update
: 2025-01-13
Size
: 4.68mb
Publisher
:
何婷
led_display
Downloaded:0
led display
Update
: 2025-01-13
Size
: 1kb
Publisher
:
hdwahfi
LEDWATER
Downloaded:0
led water
Update
: 2025-01-13
Size
: 1kb
Publisher
:
hdwahfi
s2p
Downloaded:0
convert serial to parallel
Update
: 2025-01-13
Size
: 1kb
Publisher
:
hdwahfi
scan_led
Downloaded:0
Using Hardware Description Language Verilog HDL written to achieve dynamic scanning display code.
Update
: 2025-01-13
Size
: 1kb
Publisher
:
hdwahfi
song
Downloaded:0
Using Hardware Description Language Verilog HDL written with peripheral buzzer to achieve fixed music.
Update
: 2025-01-13
Size
: 2kb
Publisher
:
hdwahfi
seqdet
Downloaded:0
10010 sequence detector based on Verilog hdl.
Update
: 2025-01-13
Size
: 266kb
Publisher
:
hdwahfi
RapidIO_avalonst
Downloaded:0
rapidio altera
Update
: 2025-01-13
Size
: 244kb
Publisher
:
朱明明
SerialComunications
Downloaded:0
Decoder and encoder for the serial communication
Update
: 2025-01-13
Size
: 197kb
Publisher
:
Diego
syncfifo
Downloaded:0
A simple single port ram based on the synchronization fifo. Can only support write-only or read-only.
Update
: 2025-01-13
Size
: 1kb
Publisher
:
刘宇洋
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