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VHDL-FPGA-Verilog list
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Vhdl language used to control traffic lights can be turned on and quartus2 software simulation, simulation accuracy, as I am.
Update : 2025-03-09 Size : 1kb Publisher : 杨帆

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Racing game, VHDL digital system design, through verification QUARTUS, very easy to use, has a very rich interpretation, games have the track circuit are linked to touch, GAME OVER
Update : 2025-03-09 Size : 3.34mb Publisher : ayls

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Stopwatch functions, bring their own works
Update : 2025-03-09 Size : 1.52mb Publisher : huliyan

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Vhdl language used arm core, compressed package code of 19 common core component of this arm, procedures, and application code should be noted that top-level entity. Used to open quartus2 simulation software.
Update : 2025-03-09 Size : 41kb Publisher : 杨帆

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Simulation of the recent serial communication network between the communication of more interested in computers, communications usb at the same time the principle of starting for serial communication therefore would like
Update : 2025-03-09 Size : 1.77mb Publisher : ayls

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Verilog using Asynchronous FIFO, the code has two modules, when the attention of top-level module and the bottom module, with direct access to open quartus2.
Update : 2025-03-09 Size : 2kb Publisher : 杨帆

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Fpga configuration FLASH_LOADERII is cpld procedures. Run on quartus60 environment.
Update : 2025-03-09 Size : 854kb Publisher : 刘飞

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The use of FPGA and hardware description language to control the read and write character LCD display
Update : 2025-03-09 Size : 797kb Publisher : 刘飞

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What are the names of songs I forgot, the code with verilog only prepared to provide a template for the music, what music would like to prepare to apply往里边format will do. This procedure can not use simulation software to
Update : 2025-03-09 Size : 1kb Publisher : 杨帆

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1. Source file stored in the src directory, QII stored in the project file directory Proj 2. Program' s function is displayed on the monitor in the VGA color stripes, a total of eight kinds of colors, you can use the
Update : 2025-03-09 Size : 614kb Publisher : 刘飞

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Use verilog to write elevator controller with the test documentation and test reports
Update : 2025-03-09 Size : 653kb Publisher : 黎德才

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Verilog 16 bit CLA source
Update : 2025-03-09 Size : 4kb Publisher : 黎德才
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