VHDL-FPGA-Verilog List Page 3612

VHDL-FPGA-Verilog list

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addDisplay Downloaded：0: add display led
Update : 2025-02-01 Size : 323kb Publisher : 吴小平
voter Downloaded：0: Design using VHDL language VHDL three new voting system for the design document and save it to check the compiler waveform simulation
Update : 2025-02-01 Size : 33kb Publisher : 米石
counter Downloaded：0: The use of EDA tools VDHL of the MAX-PlusII input method, enter the VHDL program, the realization of two counters, in the Seven-Segment Decoder by decimal display: 0,1,2,3,0 ,...。 Use 83-pin clock signal. The use of stat
Update : 2025-02-01 Size : 90kb Publisher : 米石
p2s Downloaded：0: And series converter: the input signal in parallel to serial output, where attention should be paid to the need to carry out first clock frequency, low-frequency signals received by the control timing is conducive to obs
Update : 2025-02-01 Size : 125kb Publisher : 米石
mul4 Downloaded：0: Analysis of binary multiplication in the calculation of step (adding the number of times, when it will be), the realization of a finite state machine, the implementation of multiplication.
Update : 2025-02-01 Size : 204kb Publisher : 米石
BCHencodeanddecode Downloaded：0: bch edcode and decoder
Update : 2025-02-01 Size : 171kb Publisher : 唐娇
SDCard_Controller Downloaded：0: SD Card Controller IP. Compatible with SD Card Agreement 2.0. With the wishbone bus interface to facilitate the use of other IP connections.
Update : 2025-02-01 Size : 24kb Publisher : xiafei
dianzishejishili Downloaded：0: Examples of electronic system design languages VHDL core experimental apparatus gw48eda Hangzhou Culture Development System
Update : 2025-02-01 Size : 3.59mb Publisher : familymxk
VHDL Downloaded：0: no
Update : 2025-02-01 Size : 833kb Publisher : xxl
EP1C3_12_5_RSV Downloaded：0: FPGA-based digital storage oscilloscope, using VHDL achieved compression is Quartus project bag. AD sample into FPGA, after SRAM into DA in ordinary oscilloscope can display.
Update : 2025-02-01 Size : 60kb Publisher : deadtomb
EP1C3_12_3_VGA Downloaded：0: FPGA-based VGA color display, with a total development of the reference VGA friends. Did not use DA, only 8 colors (directly connected to the VGA output of the RGB). One line, part of the market simultaneously with the c
Update : 2025-02-01 Size : 36kb Publisher : deadtomb
EP1C3_12_1_2_MOTO Downloaded：0: FPGA-based PWM DC motor control and stepper motor-driven control of a breakdown. The use of VHDL language, compression bag is under the Quartus project.
Update : 2025-02-01 Size : 1.14mb Publisher : deadtomb

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