VHDL-FPGA-Verilog List Page 3722

VHDL-FPGA-Verilog list

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abs_code Downloaded：1: This is read by the CPLD Development absolute encoder feedback signal to the code, read the motor' s rotor position and to determine the absolute direction of rotation is very useful for motor control.
Update : 2025-01-24 Size : 1.53mb Publisher : dengzhaoyun
plj Downloaded：0: Digital frequency meter is a kind of cyclical changes in the signal used to test the device operating frequency. The principle is that the specified unit of time (gate time), the record of the number of input pulses. We
Update : 2025-01-24 Size : 578kb Publisher : 庄青青
mimasuo Downloaded：0: To imitate the work of the process of locks. Locks achieve the core control functions.
Update : 2025-01-24 Size : 339kb Publisher : 庄青青
divNfreq Downloaded：0: osedge and negedge using common counter "cnt" parameter N is the double number of frequence division
Update : 2025-01-24 Size : 1kb Publisher : leng
lcd_ddram Downloaded：0: 12832LCD used to control the source text, based on the method of integration mechanisms for the preparation of status of
Update : 2025-01-24 Size : 1kb Publisher : lzh
hammingDec Downloaded：0: hamming/hamming code decoder code, usually used in communication Hamming Code
Update : 2025-01-24 Size : 1kb Publisher : leng
source Downloaded：0: the MDCT by the VHDL code
Update : 2025-01-24 Size : 10kb Publisher : amal
dec.vhd Downloaded：0: vhdl code for a 16 bit decoder design
Update : 2025-01-24 Size : 2kb Publisher : siluyuan
softdrink Downloaded：1: Vending machine implementation, the use of language VERILOG source to share with you a total of U.S. reference
Update : 2025-01-24 Size : 1kb Publisher : wangdali
s2p Downloaded：0: SERDES function, the use of language VERILOG, including the test documents to share with you, for your information
Update : 2025-01-24 Size : 1kb Publisher : wangdali
Mars_EP1C6F_fundemantal_demo Downloaded：0: FPGA development board source. Chips for the Mars EP1C6F.VHDL language. Can achieve some of the basic functions. Such as multiplier, adder, such as MUX.
Update : 2025-01-24 Size : 1.05mb Publisher : chenlu
Mars_EP1C6F_Interface_demo(VHDL) Downloaded：0: FPGA development board support VHDL code. Chips for the Mars EP1C6F. Some of the source interface. Including 7 digital tube, I2C communications.
Update : 2025-01-24 Size : 5.92mb Publisher : chenlu

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