VHDL-FPGA-Verilog List Page 3777

VHDL-FPGA-Verilog list

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VHDL_FPGA_design Downloaded：0: FPGA VHDL DESIGN
Update : 2025-01-22 Size : 213kb Publisher : dragon
19854799dul_ram(yk) Downloaded：0: Dual-port RAM of the FPGA source
Update : 2025-01-22 Size : 3kb Publisher : gadan
Avalon_VGA_Controller Downloaded：0: Vga Controller source code for Altera FPGA
Update : 2025-01-22 Size : 317kb Publisher : leblebitozu
altera_sdram Downloaded：0: Simple SDRAM controller source code for Altera DE2 board
Update : 2025-01-22 Size : 7kb Publisher : leblebitozu
oc8051.tar Downloaded：0: 8051 core writen in VHDL, fully functional and tested
Update : 2025-01-22 Size : 1.44mb Publisher : eldis
miniuart.tar Downloaded：0: Serial UART open source core. The design is engineered for use as a stand alone chip or for use with other of our cores. The reason for developing the Serial UART core is the fact, that asynchronous serial communication
Update : 2025-01-22 Size : 6kb Publisher : eldis
usb_phy.tar Downloaded：0: Very simple USB 1.1 PHY. Includes all the goodies: serial/parallel conversion, bit stuffing/unstuffing, NRZI encoding decoding. Uses a simplified UTMI interface. Currently doesn t do any error checking in the RX section
Update : 2025-01-22 Size : 7kb Publisher : eldis
simple_spi.tar Downloaded：0: Enhanced version of the Serial Peripheral Interface available on Motorola s MC68HC11 family of CPUs.Enhancements include a wider supported operating frequency range, 4deep read and write fifos, and programmable transfer
Update : 2025-01-22 Size : 561kb Publisher : eldis
mcpu_1.06b Downloaded：0: MCPU is a minimal cpu aimed to fit into a 32 Macrocell CPLD- one of the smallest available programmable logic devices. While this CPU is not powerful enough for real world applications it has proven itself as a valuable
Update : 2025-01-22 Size : 243kb Publisher : eldis
usart_verilog Downloaded：0: Uart verilog code
Update : 2025-01-22 Size : 15kb Publisher : shenhao
stopwatch Downloaded：0: the stopwatch based on fpga written with vhdl
Update : 2025-01-22 Size : 1kb Publisher : youngbing
rd_wr_control Downloaded：0: USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
Update : 2025-01-22 Size : 1kb Publisher : Somasekhar

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