VHDL-FPGA-Verilog List Page 3799

VHDL-FPGA-Verilog list

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DigitalClock Downloaded：0: VHDL digital clock counting procedures showed that 24 hours with a school function (hours, minutes) the realization of an alarm clock function (timing, downtown ring)
Update : 2025-01-21 Size : 12kb Publisher : liangchenglai
FPGAkaifashilidaohang Downloaded：1: err
Update : 2025-01-21 Size : 1.49mb Publisher : 黑洞
SHUZIMIAOBIAO Downloaded：0: Stopwatch logical structure is relatively simple, it mainly shows decoder, prescaler, decimal counter, alarm and six counter-band components. Throughout the stopwatch the most critical is how to get an accurate pulse 100
Update : 2025-01-21 Size : 6kb Publisher : 朱书洪
VHDL Downloaded：0: This is a small program written in VHDL, suitable for beginners and are learning and use!
Update : 2025-01-21 Size : 295kb Publisher : herun
VHDLyushizgp Downloaded：0: err
Update : 2025-01-21 Size : 1.02mb Publisher : alextuo
QUARTUSoksample Downloaded：0: Quartus a complete design example, a person must-see novice Quartus
Update : 2025-01-21 Size : 1.85mb Publisher : alextuo
EDA Downloaded：0: Based on the VHDL language, using design thinking Top_Down the digital clock.
Update : 2025-01-21 Size : 202kb Publisher : liyongfeng
fpga1223344 Downloaded：0: FPGA-based prescaler, can change the parameters, different multiples of the sub-frequency.
Update : 2025-01-21 Size : 16kb Publisher : 张大明
FPGA444555443 Downloaded：0: FPGA-based all-digital phase-locked loop design, with the design process and design thinking
Update : 2025-01-21 Size : 280kb Publisher : 张大明
23333333345453 Downloaded：0: PLD internal phase-locked loop, solutions, methods, the design idea.
Update : 2025-01-21 Size : 68kb Publisher : 张大明
646346666 Downloaded：0: A shift register based on the CAM of VHDL, providing download.
Update : 2025-01-21 Size : 68kb Publisher : 张大明
LTC1196 Downloaded：0: Achieve ltc1196, serial and parallel output of the changed output
Update : 2025-01-21 Size : 14kb Publisher : DIDO333

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