VHDL-FPGA-Verilog List Page 3873

VHDL-FPGA-Verilog list

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adder_32 Downloaded：1: CLA is usually necessary for digital design, the procedure for 32-bit CLA
Update : 2025-01-19 Size : 1kb Publisher : zhaohongliang
sequence_inspector Downloaded：0: Sequence detector can be used to detect one or a binary code consisting of pulse sequence signal, which in the field of digital communications in a wide range of applications. When the sequence detector row received a gr
Update : 2025-01-19 Size : 1kb Publisher : zhaohongliang
BCD_digit Downloaded：0: Based on Actel
Update : 2025-01-19 Size : 1kb Publisher : 曾捷
OPERATION_UNIT Downloaded：0: The procedure for encryption chip unit internal encryption algorithms, including 32-bit subtraction, and shift register, add/subtraction, and register and so on password-chip design has a certain computing guide
Update : 2025-01-19 Size : 2kb Publisher : zhaohongliang
mealy_state_machine Downloaded：0: This procedure for Miller classic state machine design modules, using state machine control part of the design of guiding significance for
Update : 2025-01-19 Size : 1kb Publisher : zhaohongliang
moore_in_and_mealy_out_state_machine Downloaded：0: This procedure with Moore for input, Miller output state control of some of the state machine
Update : 2025-01-19 Size : 1kb Publisher : zhaohongliang
fifo Downloaded：0: This process commonly used for the memory FIFO (FIFO), the procedure is not specified bit, so more suitable for beginners to apply
Update : 2025-01-19 Size : 1kb Publisher : zhaohongliang
32-bit_multiplier_model Downloaded：0: This procedure for 32-bit multiplier, followed VHDL test procedures
Update : 2025-01-19 Size : 2kb Publisher : zhaohongliang
FPGA Downloaded：0: FPGA design of the guiding principles of the classic, very classic, for better understanding of FPGA design methods have a very good help
Update : 2025-01-19 Size : 254kb Publisher : zjc
VHDL Downloaded：0: A realization of an integer divider of the VHDL code, as long as the n set you need the sub-frequency values on the line
Update : 2025-01-19 Size : 1kb Publisher : 褚如龙
mux21a Downloaded：0: Second, the election more than one way selector switch, to achieve signal acquisition, classification.
Update : 2025-01-19 Size : 103kb Publisher : weigong
chuankou Downloaded：0: Serial Serial VHDL realization of VHDL
Update : 2025-01-19 Size : 2kb Publisher : cheng

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