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VHDL-FPGA-Verilog list
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jsq
Downloaded:0
This procedure for 24-hour timer, stable error-free. Easy-to-use, is the Verilog HDL language beginners guide.
Update
: 2025-01-19
Size
: 1kb
Publisher
:
eda
Downloaded:0
Based on EDA technology design four decimal system solutions Cymometer
Update
: 2025-01-19
Size
: 104kb
Publisher
:
小草
0ds7cINj
Downloaded:0
Digital Cymometer VHDL procedures and simulation of the file name: plj.vhd.- Function: frequency meter. With four shows that will automatically count seven decimal results, automatic selection of effective data- four for
Update
: 2025-01-19
Size
: 98kb
Publisher
:
小草
cnt
Downloaded:0
Both a relatively good counter VHDL code: one is the generic n-bit counter, one is the syntax used in the more comprehensive. Is a better learning materials
Update
: 2025-01-19
Size
: 1kb
Publisher
:
郭新稳
VGA-VerilogHDL
Downloaded:0
Verilog HDL prepared with VGA display driver
Update
: 2025-01-19
Size
: 138kb
Publisher
:
liping
shuzizhong
Downloaded:0
Digital clock can be preset using VHDL language, LED display, an ordinary digital watch.
Update
: 2025-01-19
Size
: 1.36mb
Publisher
:
pj
USBcomm
Downloaded:0
fpga usb interface system design example, the realization of the usb communications, control-related devices to complete high-speed data acquisition, storage, data processing.
Update
: 2025-01-19
Size
: 10kb
Publisher
:
libing
fpga-fpdpsk
Downloaded:0
FSK/PSK modulation top-level documents, sine-wave modules, module initialization file sine wave, amplitude adjustment and waveform selection module, the frequency of the displayed value address generator module, the freq
Update
: 2025-01-19
Size
: 27kb
Publisher
:
libing
fpga-fredivn
Downloaded:0
fredivn.vhd even fredivn1.vhd odd-numbered sub-sub-band frequency frediv16.vhd 16 sub-frequency divider PULSE.vhd NC
Update
: 2025-01-19
Size
: 2kb
Publisher
:
libing
fpga-pulse_sequence
Downloaded:0
pulse_sequence.vhd pulse controller parallel light.vhd.vhd traffic controller division1.vhd pulse voltage pulse controller ad.vhd sub-frequency voltage pulse controller A/D control code.vhd voltage pulse of the pulse con
Update
: 2025-01-19
Size
: 6kb
Publisher
:
libing
13
Downloaded:0
para13: fifo.vhd FIFO (dual port RAM) fifo1.vhd FIFO (embedded EAB) fifo2.vhd FIFO (LPM)
Update
: 2025-01-19
Size
: 3kb
Publisher
:
libing
gvhdl
Downloaded:0
Device close to a hundred VHDL programming, although the individual is more simple, but very useful, would be of considerable help for beginners
Update
: 2025-01-19
Size
: 1.65mb
Publisher
:
葛俊杰
«
1
2
...
.72
.73
.74
.75
.76
3877
.78
.79
.80
.81
.82
...
4311
»
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