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VHDL-FPGA-Verilog list
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Original, based on the VHDL code of the digital clock (the functional modules to complete your own)
Update : 2025-01-18 Size : 4kb Publisher : q

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err
Update : 2025-01-18 Size : 294kb Publisher : 张启升

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Altera Corporation based on chapter books-source
Update : 2025-01-18 Size : 932kb Publisher : 赵向军

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err
Update : 2025-01-18 Size : 509kb Publisher : lzh

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altera DE1 SD_CARD with a sector write function procedures, has confirmed the success of running can be downloaded directly watch the effect of
Update : 2025-01-18 Size : 7.86mb Publisher : 245680

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Quartus a complete design examples, examples from installation to completion, the entire process of simulation, etc., suitable for the beginner to start from 0
Update : 2025-01-18 Size : 1.85mb Publisher : mcuxxq

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FPGA application, for example, very suitable for beginners, experts, under Mo
Update : 2025-01-18 Size : 51kb Publisher : mcuxxq

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Commonly used phase-locked loop technology, this program is in the design I used in high-frequency circuits, see the specific procedures, no problem by debugging
Update : 2025-01-18 Size : 2kb Publisher : 马新文

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Baud rate options VHDL source code has no error debug
Update : 2025-01-18 Size : 3kb Publisher : wenwen

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Application of VHDL on the SPI procedures. For novices to learn.
Update : 2025-01-18 Size : 2kb Publisher : cgc

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Only two general-purpose FPGA pins, you can realize FPGA and Ethernet PC machine! ! If you have ALTERA_DE1 development board, you can look under the direct effect, with other board you will need to reconsider the distrib
Update : 2025-01-18 Size : 860kb Publisher : 245680

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Verilog realize spi interface FPGA to achieve through the simulation, the application can be modified
Update : 2025-01-18 Size : 268kb Publisher : 强冰
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