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VHDL-FPGA-Verilog list
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Combined unit GPS clock synchronization detection unit merger GPS synchronized clock detection
Update : 2025-01-18 Size : 1kb Publisher : 远方

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Dc to use a very good book a very good use of books dc
Update : 2025-01-18 Size : 14.57mb Publisher : 王祁远

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Dds realize functions, using Quartus software, sub-modules including the adder, phase-locked loop, date-rom image to the module using integrated, using ps2 keyboard to control the frequency and phase.
Update : 2025-01-18 Size : 2.72mb Publisher : lijingfeng

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Digital Clock description of the VHDL language, with high precision and good control performance
Update : 2025-01-18 Size : 1.73mb Publisher : 张亲魄

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Can be directly downloaded to the chip used in the complete UART with FIFO procedures, vhdl language.
Update : 2025-01-18 Size : 379kb Publisher : liujingxing

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High-speed dual-port RAM realize the VHDL. Contains the simulation waveform
Update : 2025-01-18 Size : 296kb Publisher : liujingxing

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An SRAM of the source program, it is the SRAM 256kbx16bit
Update : 2025-01-18 Size : 11kb Publisher : chenyizhong

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This is a very practical, very practical, with regard to the use of software, everyone can come and see.
Update : 2025-01-18 Size : 6kb Publisher :

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This is about winning VHDL language has become signal acquisition card, is very practical, we can take a look at the.
Update : 2025-01-18 Size : 10.75mb Publisher :

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Features: Based on the VHDL language, realize high-speed A/D control devices TLC5510
Update : 2025-01-18 Size : 3kb Publisher : 黄上

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DAC0832 procedures interface circuit. Functions: generate the sawtooth frequency of 762.9Hz and simulation procedures DAC0832VHDL
Update : 2025-01-18 Size : 3kb Publisher : 黄上

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Verilog languages with four arithmetic logic unit ALU, functional reference to 74,181, including. V documents and testing. Vwf document
Update : 2025-01-18 Size : 2kb Publisher : 颜心馨
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