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usb_Blaster_rev_B_code
Downloaded:0
Russian electronic forum on the popular USB_Blaster_rev_B code. Function Needless to say, good things to share with everyone,
Update
: 2025-01-18
Size
: 4kb
Publisher
:
M
verlig
Downloaded:0
err
Update
: 2025-01-18
Size
: 2kb
Publisher
:
xiachenfeng
lwip
Downloaded:0
This code is to achieve a lwIP protocol stack can be ported to other types of embedded operating systems such as the type
Update
: 2025-01-18
Size
: 347kb
Publisher
:
张日
rentifanyingshijian
Downloaded:0
Test of human visual reaction time, can be used as VHDL programming exercises used can also be further developed into products with commercial value, there is only able to realize the human visual reaction time test the
Update
: 2025-01-18
Size
: 474kb
Publisher
:
qlh
VHDL-pansong
Downloaded:0
VHDL Practical Guide (Pan Song), is a classic on the VHDL language, including basic grammar and examples.
Update
: 2025-01-18
Size
: 4.53mb
Publisher
:
辛小怡
fpga-jingyantan
Downloaded:0
Summarize the design of the focus and attention of local, often the wrong place and so on.
Update
: 2025-01-18
Size
: 945kb
Publisher
:
辛小怡
oc_i2c_master
Downloaded:0
VHDL produced using I2C controller, is a component, you can use to add between.
Update
: 2025-01-18
Size
: 377kb
Publisher
:
辛小怡
SOPC123456
Downloaded:0
SOPC software programming foundation, using examples to explain, very suitable for beginners.
Update
: 2025-01-18
Size
: 6.46mb
Publisher
:
辛小怡
wisbone_2_ahb.tar
Downloaded:0
-------- ---- WISHBONE Wishbone_BFM IP Core---- -------- ---- This file is part of the Wishbone_BFM project---- ---- http://www.opencores.org/cores/Wishbone_BFM/---- -------- ---- Description---- ---- Implementation of W
Update
: 2025-01-18
Size
: 2.66mb
Publisher
:
liang
CPLD_PWM
Downloaded:0
A CPLD, EPM70128 realize the PWM control on the source.
Update
: 2025-01-18
Size
: 242kb
Publisher
:
路伟希
am2901
Downloaded:0
4 MCU AM2901 complete VHDL program, AM2901-based procedures, other entities, the Treasury
Update
: 2025-01-18
Size
: 7kb
Publisher
:
lxy
fifo8x9
Downloaded:0
8 deep, 9-bit wide FIFO VHDL source design, for improving on this basis can be extended
Update
: 2025-01-18
Size
: 1kb
Publisher
:
lxy
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.34
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3939
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.43
.44
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4311
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