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VHDL-FPGA-Verilog list
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irda_send_verilog
Downloaded:0
Infrared communication as a simple wireless communication technology in the electronic equipment in a wide range of applications, this chapter will be on the infrared signal through the specific decoder to decode infrare
Update
: 2025-01-13
Size
: 8kb
Publisher
:
沈天平
erweiDCT
Downloaded:0
A one-dimensional DCT to improve program design and implementation using VHDL realize, DCT and IDCT
Update
: 2025-01-13
Size
: 126kb
Publisher
:
小金
dct_at_vlsi
Downloaded:0
_ Useful two-dimensional discrete cosine transform and the VLSI realization of IP soft-core design
Update
: 2025-01-13
Size
: 1.98mb
Publisher
:
小金
c4240c
Downloaded:0
A generic VHDL source code counter, as long as some small modifications, we can realize a variety of M-ary counter.
Update
: 2025-01-13
Size
: 1kb
Publisher
:
litao
VHDL_biss
Downloaded:0
FPGA communication protocols against BiSS source decoder VHDL language
Update
: 2025-01-13
Size
: 2.2mb
Publisher
:
阿诺
EDA_LOCK_ALL
Downloaded:0
I EDA curriculum design using VHDL to write to do the smart electronic locks, in the chamber on the experiment, four parallel passwords, has alarm function and self-locking function. I spent 1 weeks time, I hope you have
Update
: 2025-01-13
Size
: 982kb
Publisher
:
zw9882
8220256202
Downloaded:0
The difference between FPGA and CPLD, for reference purposes only good things to enjoy along with everyone
Update
: 2025-01-13
Size
: 7kb
Publisher
:
z
SDRAM
Downloaded:0
FPGA-based SDRAM controller design and realization, but also better le.
Update
: 2025-01-13
Size
: 68kb
Publisher
:
rubyshirial
DE2_TV
Downloaded:0
In DE2 platform realize the DVD conversion to LED display
Update
: 2025-01-13
Size
: 321kb
Publisher
:
rubyshirial
rs-5-3
Downloaded:0
Learning to use the FPGA to do a few simple encoders, RS (5,3) code is five characters in 5-3 = 2 has two correction words
Update
: 2025-01-13
Size
: 969kb
Publisher
:
rubyshirial
usb_xilinx_vhdl
Downloaded:0
Update
: 2025-01-13
Size
: 55kb
Publisher
:
LanHbilly
watch
Downloaded:0
Using FPGA to achieve with digital watches stopwatch calendar, verilog code.
Update
: 2025-01-13
Size
: 3kb
Publisher
:
nothing
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.49
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4311
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