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VHDL-FPGA-Verilog list
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The purpose of this experiment will be practical exercises how to use DSP EVM have弦波. Enable students to gain a better understanding of TMS320C6701 EVM development system
Update : 2025-01-13 Size : 50kb Publisher : 宋涛

According to the above one-third the frequency of thinking of writing procedures, 1/3 and 50 duty cycle procedures.
Update : 2025-01-13 Size : 3kb Publisher : 宋涛

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Written by veriolg digital clock experiments with fixed time, to determine leap year, date display, download platform spantan3s400. Have a detailed annotation. Suitable for learning Verilog
Update : 2025-01-13 Size : 1.13mb Publisher : 屠宁杰

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This code used to realize the base 2 SRT divider design, you can realize more than 400MHz unsigned 32-bit fixed-point divider number (divisor, dividend and the remainder by the 16-bit integer and 16 fractional compositio
Update : 2025-01-13 Size : 2kb Publisher : 朱秋玲

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VHDL design of the circuit to simplify the problem of word document
Update : 2025-01-13 Size : 7kb Publisher : 王分

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Sensor DS18B20 way communication with the FPGA
Update : 2025-01-13 Size : 1kb Publisher : 石平政

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VHDL programming samples WORD DOC FILE
Update : 2025-01-13 Size : 4kb Publisher : kofway

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SDRAM read and write tests for our in-depth understanding of the working principle of SDRAM!
Update : 2025-01-13 Size : 153kb Publisher : 张文

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ModelSim simulation on the rom initialization method of treatment. Containing the document to explain the detailed process simulation as well as the necessary documents.
Update : 2025-01-13 Size : 793kb Publisher : 张文

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For academic research in FPGA placement and routing software VPR
Update : 2025-01-13 Size : 845kb Publisher : 暗示

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Realize this experiment, PS/2 interface with RS-232 data interface, PS/2 keyboard to press the button, through RS-232 automatic transmission to the host serial debug terminal (sscom32.exe) and data receiving display rece
Update : 2025-01-13 Size : 864kb Publisher : skyy

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Realize the function of the procedure through the I2C configuration SAA7113 chip, and then through the logic of analytical instruments to view the output data chip can output video through the video I redlogic procedures
Update : 2025-01-13 Size : 163kb Publisher : skyy
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