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VHDL-FPGA-Verilog list
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sdram_vhdl_lattice
Downloaded:0
sdram_vhdl_lattice, procedures have been transferred through the use of welcome, many exchanges Kazakhstan
Update
: 2024-12-29
Size
: 177kb
Publisher
:
蒋谦
ev-usbSIE
Downloaded:0
ev-usbSIE VHDL procedures prepared by the USB
Update
: 2024-12-29
Size
: 59kb
Publisher
:
蒋谦
VHDLTest_us
Downloaded:0
you do that? This is a test from abroad that!
Update
: 2024-12-29
Size
: 49kb
Publisher
:
似的
CPLD_CODE
Downloaded:0
collected CPLD_FPGA good code, both heroes for beginners or experts are useful references
Update
: 2024-12-29
Size
: 6kb
Publisher
:
求知
CPLD_CODE1
Downloaded:0
ju continue on the CPLD gold reference source, and I hope to help e-lovers
Update
: 2024-12-29
Size
: 9kb
Publisher
:
求知
CPLD_CODE12
Downloaded:0
final one, the other is untested and proved to be successful, then later upload
Update
: 2024-12-29
Size
: 5kb
Publisher
:
求知
keyboard_ps2_verilog
Downloaded:0
keyboard and mouse of the original code, using FPGA, using Verilog HDL preparation, already in use FPGA-mortem is over, it can be used
Update
: 2024-12-29
Size
: 1.41mb
Publisher
:
wpb3dm
VgaChinese
Downloaded:0
on display in Chinese characters, achieving the FPGA, using Verilog HDL design, However, the use of direct completely
Update
: 2024-12-29
Size
: 15kb
Publisher
:
wpb3dm
seg_led_rtl
Downloaded:0
FPGA use of digital control in the digital tube dynamic display figures that use, direct module as other sub-module, called directly
Update
: 2024-12-29
Size
: 7kb
Publisher
:
wpb3dm
pro001_buzzer
Downloaded:0
FPGA use buzzer control procedures, using Verilog HDL design, it is the buzzer sounded different voices
Update
: 2024-12-29
Size
: 761kb
Publisher
:
wpb3dm
ASIC_TFT
Downloaded:0
color TFT LCD control circuit design and ASIC implementation
Update
: 2024-12-29
Size
: 41kb
Publisher
:
njgwx
two_d_fir
Downloaded:0
FIR FILTER Verilog code
Update
: 2024-12-29
Size
: 26kb
Publisher
:
QQ
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.09
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4214
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.18
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4311
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