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VHDL-FPGA-Verilog list
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use of motor-driven CPLD for a demonstration of the use of hardware programming language, suitable for beginners
Update : 2025-02-26 Size : 740kb Publisher : lordor

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on two methods to achieve PWM 51 microcontroller-based design
Update : 2025-02-26 Size : 80kb Publisher : 皮桂

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own written on a sine (32X24) procedures
Update : 2025-02-26 Size : 1kb Publisher : 皮桂

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on a serial data input timing will be based on output data using two procedures
Update : 2025-02-26 Size : 1kb Publisher : 皮桂

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VHDL electronic Responder realized. A number of documents, the main controls are using maps the bank. The remaining modules using VHDL
Update : 2025-02-26 Size : 1.01mb Publisher : 运思

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used to achieve the two summed VHDL code, the corresponding use of compiler
Update : 2025-02-26 Size : 18kb Publisher : 计量

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instantiate some simple examples. Direct unpack, without a password.
Update : 2025-02-26 Size : 15kb Publisher : 计量

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through UART from the host PC to read image data, and complete picture of the VGA display on the show
Update : 2025-02-26 Size : 666kb Publisher : 萧飒

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four decimal frequency of top-level control modules, used to generate the required frequency measurement and control signals reset
Update : 2025-02-26 Size : 1kb Publisher : 萧飒

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quaternary counter module, the use of VHDL language, in which ISE8.1 tested model
Update : 2025-02-26 Size : 429kb Publisher : 萧飒

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family of four VHDL modules, has been tested on ISE8.1 through
Update : 2025-02-26 Size : 13kb Publisher : 萧飒

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digital timer, the use of VHDL development, the use of digital control, the precision of the ms
Update : 2025-02-26 Size : 790kb Publisher : 萧飒
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