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VHDL-FPGA-Verilog list
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divider7_50
Downloaded:0
A 50 duty on seven dividers, each company for an interview is often the subject of examination
Update
: 2025-01-21
Size
: 7mb
Publisher
:
邓智浩
DDS
Downloaded:0
FPGA-based Electronic Design Competition 2001 complete direct digital frequency synthesizer, there is part of the program FPGA, MSP430 procedures and communicate with each other, to complete all the requirements of the s
Update
: 2025-01-21
Size
: 5.32mb
Publisher
:
multiplier-ROM--FIFO-memory
Downloaded:0
Booth, array multiplier, divider alternately add and subtract, and ROM memory, FIFO memory
Update
: 2025-01-21
Size
: 19kb
Publisher
:
ZY
8bit-cpu
Downloaded:0
VHDL realization 8 of cpu design
Update
: 2025-01-21
Size
: 13kb
Publisher
:
ZY
niyiming
Downloaded:0
Matrix keyboard scanning and automatically add a digital counter display, suitable for beginners reference
Update
: 2025-01-21
Size
: 112kb
Publisher
:
顾澄昕
i2c_master_controller
Downloaded:0
Verilig language I2C Mater described controller IP core, has been the practical application, suitable for FPGA I2C interface design applications. The IP core at Altera QII 15.1 integrated software environment and include
Update
: 2025-01-21
Size
: 209kb
Publisher
:
zhang
crc32
Downloaded:0
CRC32 generation and checking circuits based on Verilog language description. Continuously or intermittently four parallel data input, real-time produce CRC32 result.
Update
: 2025-01-21
Size
: 1kb
Publisher
:
zhang
qam16-TX
Downloaded:0
Based on Altera MAX10 FPGA design of QAM16 the sender code, which uses the MAX10 Fir filter IP core. Related reference for designers, or further consultation himself.
Update
: 2025-01-21
Size
: 22kb
Publisher
:
zhang
MAX10-on-chip-flash-controller
Downloaded:0
Altera MAX10 FPGA on-chip flash controller code, although generated by QII, but you can learn a lot of hardware description language design methods, hoping to help those who are learning the language VHDL design of man.
Update
: 2025-01-21
Size
: 12kb
Publisher
:
zhang
scr
Downloaded:0
This based on the control eeprom IIC interface program code written in a use verilog. Program proven to be correct. IIC do not understand people who are very good information.
Update
: 2025-01-21
Size
: 14kb
Publisher
:
晨风
Memory-to-store-data
Downloaded:0
Memory to store variable amount of data
Update
: 2025-01-21
Size
: 1kb
Publisher
:
mohsin
soft_hdmi
Downloaded:0
Analog adv7619 hdmi 4k video output signal
Update
: 2025-01-21
Size
: 1kb
Publisher
:
毕宏伟
«
1
2
...
.80
.81
.82
.83
.84
485
.86
.87
.88
.89
.90
...
4311
»
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