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The realization of tlc5620dac control using the state machine, according to the key1 experiment, the DAC channel, 1 digital tube display, press key2, Key3 Enter the 8 digit/analog conversion value, by 3 digital tube disp
Update : 2025-01-23 Size : 180kb Publisher : 珍宝

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The VGA interface and the computer LCD screen development board connection, You can display 256 colors 640*480 resolution.
Update : 2025-01-23 Size : 172kb Publisher : 珍宝

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FPGA through PS2 receive keyboard data, and then receive the letters A to Z conversion keys corresponding ASII code, through the serial port to send to the PC machine. During the experiment, need to connect the keyboard,
Update : 2025-01-23 Size : 171kb Publisher : 珍宝

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UART has rtl, experimental tests are available, it has been used in the actual project
Update : 2025-01-23 Size : 7kb Publisher : alex

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Hdl of dm transmitter baseband processor based design and implementation including work clock master unit pilot insertion length of the training sequence generated data symbol modulated cyclic prefix and windowing IFFT/F
Update : 2025-01-23 Size : 2.48mb Publisher : 郭俊

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FPGA receive number DSP,then give out 8 PWM pluse
Update : 2025-01-23 Size : 1kb Publisher : lintianren

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IIC to GPIO
Update : 2025-01-23 Size : 973kb Publisher : 张雅

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DE2 115 SRAM QUARTUS13.1
Update : 2025-01-23 Size : 3.12mb Publisher : 黄海岸

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verilog4* 4 keyboard scan codes source file, there is debounced, verify available.
Update : 2025-01-23 Size : 428kb Publisher : 师小强

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Including PV modules, MPPT, grid system, MDL format, and is a single-phase grid.
Update : 2025-01-23 Size : 15kb Publisher : 莫顿

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Using FPGA to configure NVP6114! Absolutely original, has been successfully applied to the AHD high-definition monitor system. Write code for pure VHDL, not NIOS or MicroBlaze.
Update : 2025-01-23 Size : 3kb Publisher : sunyongchang

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Ds1302 prepared according to the power of black gold vhdl procedures, easy for beginners to learn ds1302
Update : 2025-01-23 Size : 4kb Publisher : fushenzhen
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