VHDL-FPGA-Verilog List Page 671

VHDL-FPGA-Verilog list

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gen_act Downloaded：0: ACTIVE signal generated code under the Verilog language that speaks for some low-level signal is converted to a flashing signal
Update : 2025-01-31 Size : 1kb Publisher : yezz
link_act_decode Downloaded：0: Under the Verilog language speaking LINK/ACT LINK signal is converted to a signal, that signal is converted to speak flashing fixed level
Update : 2025-01-31 Size : 1kb Publisher : yezz
VHDL-Language-Tutorial Downloaded：0: VHDL Language Tutorial, details the VHDL syntax, how to use and specific applications for R & D personnel entry and post-learning ~
Update : 2025-01-31 Size : 2.71mb Publisher : 王同同
ClkTrans Downloaded：0: Bipolar power supply, two group of signals can form the opposite polarity.
Update : 2025-01-31 Size : 1kb Publisher : guo yanru
TrafficLights Downloaded：0: the traffic light control system，can control two intersections independently, plus, the time of the red light can be altered
Update : 2025-01-31 Size : 621kb Publisher : 朱先森
Random-number-generator-verilog Downloaded：0: Verilog code for a pseudo random number generator using linear shift registers. Implemented on Basys2 with Xilinx. Project report also is included.
Update : 2025-01-31 Size : 1.12mb Publisher : sndn_shr
oooo Downloaded：0: Fpga and 51 microcontroller based precision frequency meter, through fpga for signal acquisition, data to the microcontroller to calculate, and then by 12864 for display, can be measured frequency, period, pulse width, d
Update : 2025-01-31 Size : 1.19mb Publisher : 陈伟豪
myproj Downloaded：0: 1) can produce four waveforms: sine, square, triangle wave, sawtooth wave. 2) to achieve an adjustable divider, the division ratio is adjustable 2 to 256, by adjusting the two keys is set to+1 and-1. 3) the adjustable si
Update : 2025-01-31 Size : 167kb Publisher : 陈伟豪
PPCCBB Downloaded：0: QPSK MODULATOR
Update : 2025-01-31 Size : 2.17mb Publisher : ppddr47
FPGA_EP2S90 Downloaded：0: FPGA EP2S901040C4
Update : 2025-01-31 Size : 3.71mb Publisher : ppddr47
SPI_VHDL Downloaded：0: this the simple of CC25oo verilog HDl code for FPGA thank you
Update : 2025-01-31 Size : 20kb Publisher : MGWinZ
DPSK Downloaded：0: DPSK signal
Update : 2025-01-31 Size : 396kb Publisher : 舒占军

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