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VHDL-FPGA-Verilog list
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FPGA analog and digital signal generator DDS verilog
Update : 2025-01-31 Size : 10.19mb Publisher : luowang

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Verilog example of a program that plays some tones when connected to a speaker. Implemmented in FPGA Nexys3
Update : 2025-01-31 Size : 208kb Publisher : yunacu

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Verilog example of a program that uses a 7 segment display (included in fpga) to display a counter 0 to 99. Implemmented in FPGA Nexys3
Update : 2025-01-31 Size : 8kb Publisher : yunacu

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Verilog example of a program that test the input and outputs pins FPGA by making them 1 and 0 in a specific time. Implemmented in FPGA Nexys3
Update : 2025-01-31 Size : 77kb Publisher : yunacu

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Verilog program of the interface between a FPGA and the HCSR04 arduino sensor displaying the distance measured in the 7 segment display. Implemmented in FPGA Nexys3
Update : 2025-01-31 Size : 934kb Publisher : yunacu

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C program of interface with a LCD display using an embedded processor (LatticeMico32) and a Nexys3 FPGA
Update : 2025-01-31 Size : 34kb Publisher : yunacu

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Driving USB interface chip FPGA bottom, used to transmit data to the host computer.
Update : 2025-01-31 Size : 2.09mb Publisher : 张仰望

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PGA development board used to facilitate access to information.
Update : 2025-01-31 Size : 11.25mb Publisher : 张仰望

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Multiplayer air fight implemented in VHDL. PS/2 and beeper supported. Two CPLD cores are required to run this demo. Final video includes.
Update : 2025-01-31 Size : 13.06mb Publisher :

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Using a written verilog write asynchronous FIFO
Update : 2025-01-31 Size : 1kb Publisher : 丁海军

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VHDL programming considerations and the accumulation of experience
Update : 2025-01-31 Size : 69kb Publisher : 丁海军

verilog:always block introduction
Update : 2025-01-31 Size : 913kb Publisher : 王冲
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