VHDL-FPGA-Verilog List Page 698

VHDL-FPGA-Verilog list

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UartLoop Downloaded：0: xilinx FPGA XC6LX9 serial communication program returns to send content
Update : 2025-02-01 Size : 237kb Publisher : 书才
FX2LP-FPGA Downloaded：0: xilinx FPGA XC6LX9 and communication program CY7C68013
Update : 2025-02-01 Size : 587kb Publisher : 书才
fir128 Downloaded：0: Discrete-Time FIR Filter, Filter length - 128, Number of Multipliers - 8, Number of States - 8.
Update : 2025-02-01 Size : 3kb Publisher : siv
verilog_sdram Downloaded：0: I used code verilog. Synchronous dynamic random access memory (SDRAM) is dynamic random access memory (DRAM) that is synchronized with the system bus. Classic DRAM has an asynchronous interface, which means that it respo
Update : 2025-02-01 Size : 28kb Publisher : thuanbk
hash_function_sha3 Downloaded：0: The synthesis software is Xilinx ISE version 14.4. The low throughput core has been synthesized targeting a very cheap Spartan 3 (XC3S5000-4FG900). This project is licensed under the Apache License, version 2. I prefered
Update : 2025-02-01 Size : 6kb Publisher : thuanbk
verilog-LCD1602-DS18B20 Downloaded：0: FPGA-based temperature control fan with DS18B20, LCD1602
Update : 2025-02-01 Size : 442kb Publisher : 大哥哥
spi_verilog Downloaded：0: Development language Verilog, realize spi bus control, internal top-level file, simulation files.
Update : 2025-02-01 Size : 8kb Publisher : 杰克
risc64 Downloaded：0: Risc 64 - Bit Verilog Code
Update : 2025-02-01 Size : 1kb Publisher : thannasantosh
risc32_datapath Downloaded：0: Risc - 32 Bit Datapath Only
Update : 2025-02-01 Size : 1kb Publisher : thannasantosh
ldpc_encoder_10bit Downloaded：0: LDPC Encoder 10-Bit Parity Check
Update : 2025-02-01 Size : 1kb Publisher : thannasantosh
PS2_Final Downloaded：0: nios ii with ps2 keyboard
Update : 2025-02-01 Size : 9.09mb Publisher : Thanh Minh Ha
DongHo Downloaded：0: design a clock using KIT DE1
Update : 2025-02-01 Size : 671kb Publisher : Thanh Minh Ha

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