FPGA-based ARM IP core! The soft core VHDL source code are all open

ARMcore\ARM.qpf
.......\ARM.qsf
.......\ARM.qws
.......\...CORE\26_1000\Adder.v
.......\.......\.......\ALUComb.v
.......\.......\.......\ALUShell.v
.......\.......\.......\bak\Arbitrator.v
.......\.......\.......\...\BusTransfer.v
.......\.......\.......\...\CacheMemory.v
.......\.......\.......\...\CAM.v
.......\.......\.......\...\datac2.v
.......\.......\.......\...\DataCacheController.v
.......\.......\.......\...\DataCacheMemory.v
.......\.......\.......\...\Def_ComponentEntry.v
.......\.......\.......\...\InstructionCacheController.v
.......\.......\.......\...\InstructionPreFetch.v
.......\.......\.......\...\MemoryController.v
.......\.......\.......\...\MemoryMux.v
.......\.......\.......\...\nnARM.v
.......\.......\.......\...\nnARM11.v
.......\.......\.......\...\scr.cmd
.......\.......\.......\...\System.v
.......\.......\.......\...\tb_Adder.v
.......\.......\.......\...\tb_BarrelShift.v
.......\.......\.......\...\tb_complementary.v
.......\.......\.......\...\tb_Decoder_ARM.v
.......\.......\.......\...\tb_IF.v
.......\.......\.......\...\tb_InstructionPreFetch.v
.......\.......\.......\...\tb_RegisterFile.v
.......\.......\.......\...\tb_system_fft.v
.......\.......\.......\...\tb_tomasulo.v
.......\.......\.......\...\TestInstruction.v
.......\.......\.......\BarrelShift.v
.......\.......\.......\CanGoGen.v
.......\.......\.......\complementary.v
.......\.......\.......\Decoder_ARM.v
.......\.......\.......\Def_ALUType.v
.......\.......\.......\Def_ARMALU.v
.......\.......\.......\Def_BarrelShift.v
.......\.......\.......\Def_ConditionField.v
.......\.......\.......\Def_DataCacheController.v
.......\.......\.......\Def_Decoder.v
.......\.......\.......\Def_Exception.v
.......\.......\.......\Def_InstructionCacheController.v
.......\.......\.......\Def_InstructionPreFetch.v
.......\.......\.......\Def_mem.v
.......\.......\.......\Def_MemoryController.v
.......\.......\.......\Def_Mode.v
.......\.......\.......\Def_psr.v
.......\.......\.......\Def_RegisterFile.v
.......\.......\.......\Def_SimulationParameter.v
.......\.......\.......\Def_StructureParameter.v
.......\.......\.......\D_Bus2Core.v
.......\.......\.......\IF.v
.......\.......\.......\InterruptPriority.v
.......\.......\.......\I_Bus2Core.v
.......\.......\.......\mem.v
.......\.......\.......\MemoryController_WB_Beh.v
.......\.......\.......\mul.v
.......\.......\.......\nnARM.prog
.......\.......\.......\nnARM.vpj
.......\.......\.......\nnARM1.v
.......\.......\.......\nnARMCore.v
.......\.......\.......\psr.v
.......\.......\.......\PSR_Fresh.v
.......\.......\.......\README.TXT
.......\.......\.......\RegisterFile.v
.......\.......\.......\scr.cmd
.......\.......\.......\scr1.cmd
.......\.......\.......\scr3.cmd
.......\.......\.......\tb_system.v
.......\.......\.......\ThumbDecoderWarper.v
.......\.......\.......\Thumb_2_nnARM.v
.......\.......\.......\timescalar.v
.......\.......\.......\transcript
.......\.......\.......\WishBone_Arbiter.v
.......\.......\.......\work\@a@l@u@comb\verilog.asm
.......\.......\.......\....\...........\_primary.dat
.......\.......\.......\....\...........\_primary.vhd
.......\.......\.......\....\.......shell\verilog.asm
.......\.......\.......\....\............\_primary.dat
.......\.......\.......\....\............\_primary.vhd
.......\.......\.......\....\.barrel@shift\verilog.asm
.......\.......\.......\....\.............\_primary.dat
.......\.......\.......\....\.............\_primary.vhd
.......\.......\.......\....\.can@go@gen\verilog.asm
.......\.......\.......\....\...........\_primary.dat
.......\.......\.......\....\...........\_primary.vhd
.......\.......\.......\....\.decoder_@a@r@m\verilog.asm
.......\.......\.......\....\...............\_primary.dat
.......\.......\.......\....\...............\_primary.vhd
.......\.......\.......\....\.._@bus2@core\verilog.asm
.......\.......\.......\....\.............\_primary.dat
.......\.......\.......\....\.............\_primary.vhd
.......\.......\.......\....\.i@f\verilog.asm
.......\.......\.......\....\....\_primary.dat
.......\.......\.......\...

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