The embedded FPGA oscilloscope acquisition configuration and source

fpga
....\.qsys_edit
....\..........\filters.xml
....\..........\preferences.xml
....\.sopc_builder
....\.............\filters.xml
....\.............\preferences.xml
....\ACC.qip
....\ADD12.bsf
....\ADD12.cmp
....\ADD12.qip
....\ADD12.vhd
....\ADD16.bsf
....\ADD16.cmp
....\ADD16.qip
....\ADD16.vhd
....\ADD32.bsf
....\ADD32.cmp
....\ADD32.qip
....\ADD32.vhd
....\ADD48.bsf
....\ADD48.cmp
....\ADD48.qip
....\ADD48.vhd
....\ARB_RAM.bsf
....\ARB_RAM.cmp
....\ARB_RAM.qip
....\ARB_RAM.vhd
....\CMP11.bsf
....\CMP11.cmp
....\CMP11.qip
....\CMP11.vhd
....\COUNTER12C.bsf
....\COUNTER12C.cmp
....\COUNTER12C.qip
....\COUNTER12C.vhd
....\CST128.bsf
....\CST128.cmp
....\CST128.qip
....\CST128.vhd
....\CT12.bsf
....\CT12.cmp
....\CT12.qip
....\CT12.vhd
....\CT32C.bsf
....\CT32C.cmp
....\CT32C.qip
....\CT32C.vhd
....\DCODE_4_16.bsf
....\DCODE_4_16.cmp
....\DCODE_4_16.qip
....\DCODE_4_16.vhd
....\DDS.bdf
....\DDS.bsf
....\DECODE_3_8.bsf
....\DECODE_3_8.cmp
....\DECODE_3_8.qip
....\DECODE_3_8.vhd
....\DSO.bdf
....\EP4CE6E144_2.tcl
....\EP4CE6E144_2.tcl.bak
....\FD32C.v
....\FD32C.v.bak
....\MFREQ.bdf
....\MFREQ.bsf
....\MUX2_1_1.bsf
....\MUX2_1_1.cmp
....\MUX2_1_1.qip
....\MUX2_1_1.vhd
....\MUX_2_1_12.bsf
....\MUX_2_1_12.cmp
....\MUX_2_1_12.qip
....\MUX_2_1_12.vhd
....\MUX_2_1_8.bsf
....\MUX_2_1_8.cmp
....\MUX_2_1_8.qip
....\MUX_2_1_8.vhd
....\PLL.bsf
....\PLL.cmp
....\PLL.ppf
....\PLL.qip
....\PLL.vhd
....\PLLJ_PLLSPE_INFO.txt
....\arb.asm.rpt
....\arb.bdf
....\arb.bsf
....\arb.cdf
....\arb.done
....\arb.fit.smsg
....\arb.fit.summary
....\arb.flow.rpt
....\arb.jdi
....\arb.map.summary
....\arb.pin
....\arb.sta.summary
....\arb_description.txt
....\burst.bsf
....\burst.v
....\burst.v.bak
....\cst1024.bsf

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