Introduction - If you have any usage issues, please Google them yourself
FPGA and SOPC based on the use of VHDL language EDA data acquisition circuit and simple storage oscilloscope
Packet : 77433650expt83_rsvscp.rar filelist
EXPT83_RSVSCP
EXPT83_RSVSCP\ADCINT.BSF
EXPT83_RSVSCP\ADCINT.VHD
EXPT83_RSVSCP\CNT10B.BSF
EXPT83_RSVSCP\CNT10B.VHD
EXPT83_RSVSCP\RAM8B.BSF
EXPT83_RSVSCP\RAM8B.VHD
EXPT83_RSVSCP\RESV.BDF
EXPT83_RSVSCP\RESV.CDF
EXPT83_RSVSCP\RESV.PIN
EXPT83_RSVSCP\RESV.QPF
EXPT83_RSVSCP\RESV.QSF
EXPT83_RSVSCP\RESV.QWS
EXPT83_RSVSCP\RESV.SOF
EXPT83_RSVSCP\RESV.done
EXPT83_RSVSCP\RESV.fit.eqn
EXPT83_RSVSCP\RESV.fit.summary
EXPT83_RSVSCP\RESV.flow.rpt
EXPT83_RSVSCP\cmp_state.ini