FPGA and SOPC based on the use of VHDL language EDA sampling high-speed A/D of the storage oscilloscope

Packet : 97288427expt12_5_rsv.rar filelist
EXPT12_5_RSV
EXPT12_5_RSV\DPRAM.VHD
EXPT12_5_RSV\RESERV.ACF
EXPT12_5_RSV\RESERV.CDF
EXPT12_5_RSV\RESERV.HIF
EXPT12_5_RSV\RESERV.PIN
EXPT12_5_RSV\RESERV.QPF
EXPT12_5_RSV\RESERV.QSF
EXPT12_5_RSV\RESERV.QWS
EXPT12_5_RSV\RESERV.SOF
EXPT12_5_RSV\RESERV.VHD
EXPT12_5_RSV\RESERV.asm.rpt
EXPT12_5_RSV\RESERV.done
EXPT12_5_RSV\RESERV.fit.summary
EXPT12_5_RSV\RESERV.flow.rpt
EXPT12_5_RSV\RESERV.map.rpt
EXPT12_5_RSV\RESERV.map.summary
EXPT12_5_RSV\RESERV.tan.summary
EXPT12_5_RSV\RRR.VHD
EXPT12_5_RSV\STP1.STP
EXPT12_5_RSV\cmp_state.ini
EXPT12_5_RSV\serv_req_info.txt
EXPT12_5_RSV\DATA
EXPT12_5_RSV\DATA\LUT8X10.HEX
EXPT12_5_RSV\DATA\LUT8X10.MIF
EXPT12_5_RSV\README
EXPT12_5_RSV\README\GW48使用readme.txt
EXPT12_5_RSV\db
EXPT12_5_RSV\db\RESERV.db_info
EXPT12_5_RSV\db\RESERV.project.hdb

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