Introduction - If you have any usage issues, please Google them yourself
FPGA and SOPC based on the use of VHDL language EDA color signal of the VGA display controller
Packet : 95302959ep1c6_12_3_vgaimg.rar filelist
EP1C6_12_3_VGAimg
EP1C6_12_3_VGAimg\IMG.CDF
EP1C6_12_3_VGAimg\IMG.PIN
EP1C6_12_3_VGAimg\IMG.QPF
EP1C6_12_3_VGAimg\IMG.QSF
EP1C6_12_3_VGAimg\IMG.QWS
EP1C6_12_3_VGAimg\IMG.SOF
EP1C6_12_3_VGAimg\IMG.VHD
EP1C6_12_3_VGAimg\IMG.done
EP1C6_12_3_VGAimg\IMGROM.MIF
EP1C6_12_3_VGAimg\IMGROM.VHD
EP1C6_12_3_VGAimg\cmp_state.ini
EP1C6_12_3_VGAimg\vga640480.vhd