Streamlined verilong serial communication source code, with communication custom module

rx_tx_interface_demo
rx_tx_interface_demo\inter_control_module.v
rx_tx_interface_demo\rx_interface
rx_tx_interface_demo\rx_interface\rx_fifo_module
rx_tx_interface_demo\rx_interface\rx_fifo_module\rx_fifo_module.v
rx_tx_interface_demo\rx_interface\rx_fifo_module\rx_fifo_module_bb.v
rx_tx_interface_demo\rx_interface\rx_fifo_module\rx_fifo_module_inst.v
rx_tx_interface_demo\rx_interface\rx_interface.v
rx_tx_interface_demo\rx_interface\rx_module
rx_tx_interface_demo\rx_interface\rx_module\detect_module.v
rx_tx_interface_demo\rx_interface\rx_module\rx_bps_module.v
rx_tx_interface_demo\rx_interface\rx_module\rx_control_module.v
rx_tx_interface_demo\rx_interface\rx_module\rx_module.v
rx_tx_interface_demo\rx_interface\rx_top_control_module
rx_tx_interface_demo\rx_interface\rx_top_control_module\rx_top_control_module.v
rx_tx_interface_demo\rx_tx_interface_demo.v
rx_tx_interface_demo\tx_interface
rx_tx_interface_demo\tx_interface\tx_fifo_module
rx_tx_interface_demo\tx_interface\tx_fifo_module\tx_fifo_module.v
rx_tx_interface_demo\tx_interface\tx_fifo_module\tx_fifo_module_bb.v
rx_tx_interface_demo\tx_interface\tx_fifo_module\tx_fifo_module_inst.v
rx_tx_interface_demo\tx_interface\tx_interface.v
rx_tx_interface_demo\tx_interface\tx_module
rx_tx_interface_demo\tx_interface\tx_module\tx_bps_module.v
rx_tx_interface_demo\tx_interface\tx_module\tx_control_module.v
rx_tx_interface_demo\tx_interface\tx_module\tx_module.v
rx_tx_interface_demo\tx_interface\tx_top_control_module
rx_tx_interface_demo\tx_interface\tx_top_control_module\tx_top_control_module.v

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