Introduction - If you have any usage issues, please Google them yourself
Packet : 9927414xilinx7-2.rar filelist
Xilinx7-2
Xilinx7-2\Example-7-2
Xilinx7-2\Example-7-2\iMPACT_Demo
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\_ngo
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav
Xilinx7-2\Example-7-2\iMPACT_Demo\源代码
Xilinx7-2\Example-7-3
Xilinx7-2\Example-7-3\chipscope_Demo
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\work
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\work\glbl
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\work\prescale_counter
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\work\testbench
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\xst
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\xst\work
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\xst\work\vlg12
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\_ngo
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\__projnav
Xilinx7-2\Example-7-3\chipscope_Demo\源文件
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\.untf
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\automake.log
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\bitgen.ut
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\cnt60.jhd
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\cnt60.v
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\core.tpl
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\coregen.prj
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\decode.jhd
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\decode.v
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\hex2led.jhd
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\hex2led.v
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\readme
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\smallcntr.jhd
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\smallcntr.v
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\statmach.jhd
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\statmach.v
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.ana
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.bgn
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.bit
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.bld
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.cmd_log
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.dly
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.drc
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.jhd
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.mrp
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.nc1
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.ncd
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.ngc
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.ngd
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.ngm
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.ngr
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.pad
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.par
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.pcf
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.prj
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.sprj
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.stx
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.syr
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.twr
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.twx
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.ut
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.v
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch.xpi
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch_cclktemp.bit
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch_last_par.ncd
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch_map.ncd
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch_map.ngm
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch_ngdbuild.nav
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch_tb.jhd
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch_tb.tbw
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch_tb.tf
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch_tb_timing.jhd
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\stopwatch_tb_timing.tf
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\tenths.edn
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\tenths.jhd
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\tenths.ngo
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\tenths.v
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\tenths.veo
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\tenths.xco
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\tenths.xcp
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\untitled.cdf
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\watchver.exc
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\watchver.npl
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\watchver.ucf
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\watchver_0.exo
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\watchver_0.prm
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\watchver_0.sig
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\watchver_1.exo
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\watchver_1.prm
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\watchver_1.sig
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\_ngo\netlist.lst
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\_ngo\tenths.ngo
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\bitgen.rsp
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\cnt60_jhdparse_tcl.rsp
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\decode_jhdparse_tcl.rsp
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\ednTOngd_tcl.rsp
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\hex2led_jhdparse_tcl.rsp
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\map.log
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\nc1TOncd_tcl.rsp
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\p00jn000.kis
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\p00ra000.kis
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\par.log
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\posttrc.log
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\runXst_tcl.rsp
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\smallcntr_jhdparse_tcl.rsp
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\statmach_jhdparse_tcl.rsp
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\stopwatch.xst
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\stopwatch._prj
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\stopwatch._sprj
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\stopwatch_jhdparse_tcl.rsp
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\stopwatch_ncdTOut_tcl.rsp
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\stopwatch_tb_timing_jhdparse_tcl.rsp
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\watchver.gfl
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav\watchver_flowplus.gfl
Xilinx7-2\Example-7-2\iMPACT_Demo\watchver\__projnav.log
Xilinx7-2\Example-7-2\iMPACT_Demo\源代码\cnt60.v
Xilinx7-2\Example-7-2\iMPACT_Demo\源代码\decode.v
Xilinx7-2\Example-7-2\iMPACT_Demo\源代码\hex2led.v
Xilinx7-2\Example-7-2\iMPACT_Demo\源代码\smallcntr.v
Xilinx7-2\Example-7-2\iMPACT_Demo\源代码\statmach.v
Xilinx7-2\Example-7-2\iMPACT_Demo\源代码\stopwatch.v
Xilinx7-2\Example-7-2\iMPACT_Demo\源代码\tenths.v
Xilinx7-2\Example-7-2\示例说明.doc
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\707.cpj
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\709.cpj
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\automake.log
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\bitgen.ut
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\coregen.log
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\coregen.prj
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\invchn26.vcd
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.bgn
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.bit
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.bld
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.cdc
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.cmd_log
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.dhp
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.drc
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.html
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.lso
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.mrp
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.nc1
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.ncd
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.ngc
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.ngd
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.ngm
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.ngr
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.npl
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.pad
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.pad_txt
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.par
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.pcf
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.placed_ncd_tracker
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.prj
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.pwr
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.routed_ncd_tracker
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.stx
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.syr
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.tdr
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.twr
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.twx
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.txt
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.ucf
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.ucf.untf
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.ut
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.v
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter.xpi
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counterfailed.txt
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter_bkp.ngd
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter_ise5_bak.zip
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter_last_par.ncd
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter_map.ncd
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter_map.ngm
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter_pad.csv
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter_pad.txt
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\prescale_counter_vhdl.prj
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\temp.ngc
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\testbench.tf
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\testbench.udo
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\transcript
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\work\glbl\verilog.asm
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\work\glbl\_primary.dat
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\work\glbl\_primary.vhd
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\work\prescale_counter\verilog.asm
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\work\prescale_counter\_primary.dat
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\work\prescale_counter\_primary.vhd
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\work\testbench\verilog.asm
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\work\testbench\_primary.dat
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\work\testbench\_primary.vhd
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\work\_info
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\xst\work\hdllib.ref
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\xst\work\vlg12\prescale_counter.bin
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\_ngo\icon_pro.edn
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\_ngo\icon_pro.ncf
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\_ngo\icon_pro.ngo
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\_ngo\ila_pro_0.edn
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\_ngo\ila_pro_0.ncf
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\_ngo\ila_pro_0.ngo
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\_ngo\ila_pro_1.edn
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\_ngo\ila_pro_1.ncf
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\_ngo\ila_pro_1.ngo
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\_ngo\netlist.lst
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\_ngo\prescale_counter_signalbrowser.ngo
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\_ngo\prescale_counter_signalbrowser.ver
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\__projnav\bitgen.rsp
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\__projnav\coregen.rsp
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\__projnav\ednTOngd_tcl.rsp
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\__projnav\map.log
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\__projnav\nc1TOncd_tcl.rsp
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\__projnav\par.log
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\__projnav\posttrc.log
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\__projnav\prescale_counter.gfl
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\__projnav\prescale_counter.xst
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\__projnav\prescale_counter_flowplus.gfl
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\__projnav\prescale_counter_ncdTOut_tcl.rsp
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\__projnav\runXst_tcl.rsp
Xilinx7-2\Example-7-3\chipscope_Demo\prescale_counter\__projnav.log
Xilinx7-2\Example-7-3\chipscope_Demo\源文件\prescale_counter.v
Xilinx7-2\Example-7-3\示例说明.doc