Description: Matlab and used to achieve dds dspbuilder produce sine module source code,
- [dds] - Direct Digital Frequency Synthesizer dds
- [DDS_VERILOG] - the cases presented DDS VERIOG procedure
- [JPEG.M] - Jpeg image compression Matlab source for
- [MatlabDspBuilder] - based on Matlab/DspBuilder designed port
- [EP1C3_12_9_DDS] - direct digital frequency synthesis (DDS)
- [DSPBuilder_5.1_Training] - DSPBuilder5.1 training on information pp
- [signal_gen] - This is a signal generator, I believe th
- [dspbuilder] - Dspbuilder to do with a few examples, in
- [DDs] - This is my graduation project is the use
- [tdmddc_v71] - ddc the VHDL source code, no debugging,
File list (Check if you may need any files):