UART_ise7_bak using FPGA full-duplex asynchronous

Title: UART_ise7_bak

Category:
VHDL-FPGA-Verilog
Tags:
File Size:
32.4kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
tiananle

Description: using FPGA full-duplex asynchronous serial port (UART), and PC communication. An initiation; 8 data spaces; One-stop; No Parity; Baud Rate for 2400,4800,9600, 11520 optional or variable (baud rate can be used to control keypad mode).

Downloaders recently: [More information of uploader tiananle]

To Search: uart fpga uart fpga pc fpga FPGA Serial port UART_ise7_bak uart fpga

[haveaGaussianrandomprocess.Rar] - containing a Gaussian random occurrence
[usbdriver] - Basic programing method for USB driver,
[uart_iccavr] - UART for example RS232 serial communicat
[vb6.0doRS232serialdigitalinputtotheprogra] - vb6.0 do so RS232 serial digital input t
[ucosOnMSP430] - one in TI's MSP430 transplant UCOS2 oper
[UART] - ATmega128 single-chip attachment of AVR-
[uart] - An FPGA using Verilog realization of the
[uart] - VHDL languages realize UART protocol pro
[new-lins-uart-all] - Selfless dedication, VHDL source code fo
[uart] - uart vhdl quartus

File list (Check if you may need any files):

Main Category

SourceCode

Web Code

Develop Tools

Document

Other resource

Category

Games

Plug-in

Trojan

Program registrar

SDK

Other

About site

CodeBus www.codebus.net