9.7_DIRIVER_control based on Verilog-HDL hardware

Title: 9.7_DIRIVER_control

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
2.46kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
zhiguoning

Description: based on Verilog-HDL hardware Circuit of 9.7 Stepper Motor Control 9.7 .1 stepper motor-driven logic symbols 9.7.2 stepper motor driven map the chronology-- Step 9.7.3 Machine-driven logic diagram 9.7.4 Counting Module Design and Implementation 9.7.5 decoding module design and Implementation 9.7.6 stepper motor driven Verilog-HDL Compiler means locale 9.7.7 Description Order- "macro substitution` define "the use 9.7.8 compiler directives-" The time scale `tim escale "use 9.7.9 system tasks-" $ finish "to use 9.7.10 stepper motor drive hardware

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To Search: 9.7_DIRIVER_control.rar verilog step motor fpga stepper control motor control verilog Verilog machine stepper motor Verilog

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