Description: IDE to SATA conversion of source code, only to learn development environment QUARTUS2
- [mp3_decoder] - mp3 of VHDL, including HUFFMAN encoder,
- [MineSweep] - api realized mine games, imitation windo
- [fpga(CAN).Rar] - fpga CAN Bus Controller source, each wit
- [ocidec3] - IDE of the Verilog design, has been veri
- [services] - Completed apart from C delete all disks
- [ata.tar] - The use of two types of Verilog and VHDL
- [88] - Source book. From a one-time should not
- [sata] - sata specification document
- [readme_vhd] - SERDES VHDL source code, you can achieve
- [vera_user_guide] - Vera UserGuide, verification manual
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