Description: Sinusoidal signal generator, data, procedures sampling 256 points, can realize the cycle output and FM.
- [sinewavedataV0.1] - sine wave data generation procedures, up
- [ICP] - Development of telecommunications value-
- [cache_4510] - arm7 s3c4510, Cache in the embedded proc
- [DDS] - DDS-based digital phase-shifting sinusoi
- [sine-generator] - Original: Using VHDL languages sinusoida
- [FPGA_signal_general] - Abstract: Direct Digital Synthesis (DDS)
- [EP1C3_12_10_PHAS] - FPGA-based phase-shifting of the DDS sig
- [vhdl_dds] - VHDL language using a simple DDS, easy t
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