chengxu MaxplusII used in the VHDL language progra

Title: chengxu

Category:
VHDL-FPGA-Verilog
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File Size:
759.78kb
Update:
2008-10-13
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Uploaded by:
lei_yonkon

Description: MaxplusII used in the VHDL language programming realization of digital base-band signal synchronization extraction, is a password input and modify the examples. Experimental box in the hardware connection, and will download to the main chip to complete.

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